Senior Post Silicon Validation Engineer - LPU

NVIDIA; Santa Clara (CA); On-site; USD 196,000 - 368,000; Full time

Benefits offered by this job

Comprehensive benefits package

Equity opportunities

Job summary

NVIDIA is looking for a Senior Post Silicon Validation Engineer in Santa Clara, California. This role involves developing and validating system-level tests for high-volume manufacturing of SOCs, GPUs, and ASICs. The ideal candidate has an MS/PhD with over 12 years' experience in the post-silicon validation environment and proven leadership skills. Benefits include competitive salaries ranging from $196,000 to $368,000, along with a comprehensive benefits package.

Qualifications

• 12+ years of relevant industry experience.
• Experience in post-silicon electrical validation of high-power, high-speed SOCs.
• Good understanding of lab equipment and measurement techniques for high-speed interfaces.

Responsibilities

• Lead the design and validation of System Level Tests for HVM of SOCs.
• Develop and integrate test flows and automation for robust SLT coverage.
• Collaborate with chip design teams to define production-ready SLT.

Skills

Electrical Engineering

Post-Silicon Validation

Python

Leadership

Problem-Solving

Communication

Education

MS/PhD in Electrical Engineering, Computer Science, or Computer Engineering

Tools

Lab Equipment

Job description

NVIDIA is seeking a Senior Post Silicon Validation Engineer to develop and validate system‑level tests (SLT) for high‑volume manufacturing (HVM) of SOCs, GPUs, and ASICs.

What You'll Be Doing

• Lead the design, automation, and validation of System Level Tests (SLT) for HVM of complex, high‑power, high‑speed SOCs.
• Develop and integrate test flows, scripts and automation to ensure robust SLT coverage and seamless communication between test controllers and peripherals.
• Partner with system architecture, chip design and validation teams to define and deliver production‑ready SLT and HVM test solutions.
• Drive custom SLT development to optimize system performance, power efficiency and test coverage.
• Oversee handler selection, enablement and hardware integration – including PCB design, socket selection and temperature control systems.
• Improve manufacturing test quality by enhancing test correlation, yield and reliability across NPI, HVM and RMA processes.
• Collaborate closely with OSATs on production enablement, sustaining, yield analysis and DPPM reduction initiatives.
• Support silicon qualification and reliability testing (HTOL, burn‑in) at the system level.

What We Need to See

• MS/PhD in Electrical Engineering, Computer Science, or Computer Engineering (or equivalent experience).
• 12+ years of relevant industry experience.
• Experience in post‑silicon electrical validation of high‑power, high‑speed, complex SOCs.
• Proven leadership of a full system validation from silicon out to production start.
• Silicon validation experience in the area of SerDes, LSIO, Logic and Memory.
• Experience in system marginality validation.
• Good understanding of lab equipment and measurement techniques for high‑speed interfaces.
• Strong understanding of firmware and ability to debug and create new test cases.
• Software proficiency in Python for test scripting, data handling and reporting.
• Knowledge of board and package design, signal integrity and data handling.
• Excellent problem‑solving skills, good communication, and ability to work cooperatively in a team environment.

Benefits

Base salary ranges are $196,000–$310,500 for Level 5 and $232,000–$368,000 for Level 6, with additional equity. NVIDIA offers a comprehensive benefits package to you and your family.

Equal Employment Opportunity

NVIDIA is an equal‑opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.