Senior Physical Verification CAD Engineer — AI-Driven Flows

Micron Technology, Inc.; Boise (ID); On-site; USD 104,000 - 221,000; Full time

Job summary

Micron Technology, Inc. in Boise, Idaho is seeking a Senior CAD Engineer – Physical Verification to develop and maintain verification flows for memory products. You will translate rules into checks, define test coverage, and collaborate with cross-functional teams to ensure robust signoff.

The role requires 5+ years in CAD/EDA or semiconductor design, proficiency in Python and scripting, and strong CMOS/VLSI fundamentals. Calibre and SVRF experience are advantageous.

Qualifications

• 5+ years of CAD/EDA or semiconductor design experience.
• Experience with DRC and LVS physical verification.
• Proficiency in Python and scripting (e.g., Tcl, Perl).
• Solid CMOS and VLSI fundamentals with debugging skills.
• Experience with Calibre DRC/LVS and SVRF is a plus.

Responsibilities

• Develop and maintain physical verification tools, flows, and methodologies for DRAM, HBM, NAND, and emerging memory products.
• Translate process design rules into verification checks and define test cases and regression methods.
• Partner with process, design, layout, modeling, and verification teams to define signoff strategies and resolve issues.
• Guide design teams on verification methodologies, waivers, debugging, and provide training and production support.
• Automate verification setup, execution, and reporting, including AI-assisted analysis.

Skills

Python

C++

C

Tcl

Perl

SKILL

Linux

Education

Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, or Computer Science

Tools

Cadence Calibre

SVRF

nmDRC

nmLVS

RVE

Cadence Virtuoso

Job description

Micron Technology, Inc. in Boise, Idaho is seeking a Senior CAD Engineer – Physical Verification to develop and maintain verification flows for memory products. You will translate rules into checks, define test coverage, and collaborate with cross-functional teams to ensure robust signoff.

The role requires 5+ years in CAD/EDA or semiconductor design, proficiency in Python and scripting, and strong CMOS/VLSI fundamentals. Calibre and SVRF experience are advantageous.