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A technology firm is seeking a Senior Physical Design Engineer in the U.S. This role focuses on block- and chip-level physical design using Cadence Innovus, leading critical design aspects for GF 22nm technology. Candidates should have over 8 years of PnR implementation experience and strong leadership abilities. Competitive salary of $140,000 to $160,000 plus benefits packaged and remote working options.
Position: Senior Physical Design Engineer – Place & Route (PnR) - Remote
Location: Remote (within the U.S.)
Employment Type: Full-time (Salary + Benefits + Bonus) or Contractor
Eligibility: U.S. Citizens or Green Card holders.
Description:
Owns and drives block- and chip-level physical design in Cadence Innovus for GF 22nm. Leads floorplanning, power grid design, placement, CTS, routing, and congestion management. Provides guidance on design partitioning, hierarchy planning, and physical verification (DRC/LVS). Plays a key role in balancing power, performance, and area (PPA) trade-offs and delivering design closure on schedule.
The anticipated annual base salary for this position is between $140,000 to $160,000, which also includes a comprehensive benefits package.
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