Senior Physical Design Engineer for AI ASIC & Tapeout

Tenstorrent; Colorado; Hybrid; USD 100,000 - 500,000; Full time

Job summary

Tenstorrent is seeking a mid- to senior-level Physical Design Engineer to drive the physical design of high-performance AI/ML chips, from synthesis through tapeout. You will collaborate with front-end and physical design teams to optimize floorplanning, timing, power, performance and area across multiple IPs.

This hybrid role is based in Austin, TX, Fort Collins, CO, or Santa Clara, CA, and welcomes candidates across experience levels, with offers aligned to the appropriate level.

Qualifications

• BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• Experience with synthesis, place-and-route flows, and physical design tools.
• Familiarity with timing, EM/IR, and power analysis.
• Strong Tcl, Perl, Shell, and/or Python skills; knowledge of low-power techniques.

Responsibilities

• Contribute to physical design of high-performance AI/ML ASICs from synthesis to tapeout.
• Collaborate with front-end and physical design engineers to optimize floorplanning, timing, power, and area.
• Support clocking, I/O planning, and timing closure across multiple IPs.

Skills

Synthesis

Place-and-Route

Timing analysis

Power analysis

Python / Tcl / Shell

Education

BS/MS/PhD in Electrical Engineering, Computer Engineering, or Computer Science

Tools

Synthesis tools

Physical design tools

Job description

Tenstorrent is seeking a mid- to senior-level Physical Design Engineer to drive the physical design of high-performance AI/ML chips, from synthesis through tapeout. You will collaborate with front-end and physical design teams to optimize floorplanning, timing, power, performance and area across multiple IPs.

This hybrid role is based in Austin, TX, Fort Collins, CO, or Santa Clara, CA, and welcomes candidates across experience levels, with offers aligned to the appropriate level.