IP Physical Design Engineer – AI Accelerator Tapeouts

Tenstorrent; Austin (TX); Hybrid; USD 100,000 - 500,000; Full time

Job summary

Tenstorrent is seeking a hands-on Physical Design Engineer to take ownership of IP blocks from synthesis through place-and-route and signoff. You will work closely with RTL teams to meet aggressive PPA targets on advanced nodes and to deliver robust IP integration collateral (LEF/DEF, timing and power models, GDS).

The role supports hybrid work with locations including Austin, TX. The ideal candidate has 5+ years in block-level/IP physical design, strong scripting (Tcl/Python), and hands-on

Qualifications

• BS/MS/PhD in EE/ECE/CE/CS with 5+ years of block-level or IP-centric physical design through tapeout.
• Expertise with industry-standard tools (Innovus, ICC2/FusionCompiler, PrimeTime) and scripting languages (Tcl, Python, Perl).
• Deep understanding of advanced node challenges, low-power design (UPF, power gating, multi-Vt, voltage scaling), and signoff (STA, LEC)).
• Experience building floorplans, power grids, pin placement, and clocking strategies, and delivering IP integration collateral (LEF/DEF, timing and power models, GDS, signoff reports).

Responsibilities

• Own physical implementation of IP blocks end to end, from synthesis through PnR and signoff.
• Work with RTL owners to optimize PPA and meet power budgets.
• Contribute to signoff quality to ensure IP ships smoothly to customers.
• Deliver IP integration collateral and run tapeouts for advanced nodes.

Skills

Block-level design

IP tapeouts

PPA optimization

Tcl/Python scripting

Education

BS/MS/PhD in EE/ECE/CE/CS

Tools

Innovus

ICC2/FusionCompiler

PrimeTime

Job description

Tenstorrent is seeking a hands-on Physical Design Engineer to take ownership of IP blocks from synthesis through place-and-route and signoff. You will work closely with RTL teams to meet aggressive PPA targets on advanced nodes and to deliver robust IP integration collateral (LEF/DEF, timing and power models, GDS).

The role supports hybrid work with locations including Austin, TX. The ideal candidate has 5+ years in block-level/IP physical design, strong scripting (Tcl/Python), and hands-on