An innovative AI infrastructure startup in the United States is seeking a Physical Design Engineer with over 10 years of experience. You will be responsible for defining the Physical Assembly of SoC and developing methodologies to optimize performance for AI data centers. Candidates should have expertise in synthesis design, scripting, and deep sub-micron technologies. Join a world-class engineering team and contribute to groundbreaking advancements in AI technology.
Qualifications
Minimum of 10+ years of experience in relevant field.
Knowledge of CAD tools for analysis and verification.
Familiarity with logic and physical design principles.
Responsibilities
Define the Physical Assembly of SOC including various functions.
Design and Architect Top Level and Block Level Floor planning.
Develop physical design methodologies for optimizing PPA.
Skills
Synthesis design constraints (SDC)
Physical design methodologies
Low-power design
Fluency in scripting (Unix, Perl, Python, TCL)
Deep sub-micron technologies
Verilog and System Verilog
Problem solving
Team collaboration
Education
Master’s or Bachelor's Degree in Electrical Engineering
Tools
Innovus
Synopsys Fusion Compiler
Job description
An innovative AI infrastructure startup in the United States is seeking a Physical Design Engineer with over 10 years of experience. You will be responsible for defining the Physical Assembly of SoC and developing methodologies to optimize performance for AI data centers. Candidates should have expertise in synthesis design, scripting, and deep sub-micron technologies. Join a world-class engineering team and contribute to groundbreaking advancements in AI technology.