Senior Physical Design and Timing Engineer

NVIDIA Corporation; Santa Clara (CA); Hybrid; USD 136,000 - 265,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA Corporation is seeking a Senior Physical Design and Timing Engineer to lead high-frequency and low-power design across CPUs, GPUs, LPUs and SoCs. The role emphasizes RTL-to-tapeout, floorplanning, and ECO troubleshooting with cross-functional collaboration across teams.

The position requires 5+ years (BS) or 3+ years (MS) in physical design, plus strong scripting and EDA proficiency. Equity benefits are included; applications accepted until Oct 3, 2026.

Qualifications

• BS in Electrical or Computer Engineering with 5+ years in physical design or MS with 3+ years.
• Hands-on experience from RTL to tapeout including synthesis, floorplanning, timing, signoff, ECOs.
• Proven improvements in power, performance, and area through design optimizations and timing closure.
• Experience in static timing analysis, timing constraints, and multi-mode/multi-corner timing closure.
• Proficiency with Python, Tcl, Perl, Make and scripting; knowledge of AI/ML/DL/LLMs.

Responsibilities

• Drive physical design and timing of high-frequency CPUs, GPUs, LPUs and SoCs at block, cluster, or full-chip level.
• Help drive frontend and backend implementation from RTL to GDS2, including synthesis, EC, floorplanning, timing constraints, timing/power convergence, ECOs.
• Work in a cross-functional environment interacting with multiple teams.

Skills

Python

Tcl

Perl

Make

AI/ML/DL/LLMs

Power/Perf/Area optimization

Education

BS in Electrical or Computer Engineering

MS in Electrical or Computer Engineering

Tools

EDA tools

Job description

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. We have some of the most forward-thinking and hardworking people in the world working for us.

We are now looking for a motivated Senior Physical Design and Timing Engineer to join our dynamic and growing team.

What you'll be doing:

• Drive physical design and timing of high-frequency and low-power NVIDIA CPUs, GPUs, LPUs and SoCs at block level, cluster level, and/or full chip level.
• Help in driving frontend and backend implementation from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation.
• Work in a cross-functional environment interacting with multiple teams.

What we need to see:

• BS (or equivalent experience) in Electrical or Computer Engineering with 5+ years of experience, or MS (or equivalent experience) with 3+ years of experience in physical design, synthesis, and timing.
• Strong hands-on experience taking complex blocks, IPs, or chips from RTL/netlist to tapeout through logic synthesis, floorplanning, placement, clock-tree synthesis, routing, physical optimization, signoff, and ECOs.
• Demonstrated success improving power, performance, and area through design improvements, critical-path planning and crafting, or methodology/workflow improvements.
• Hands‑on experience in block, sub‑chip, and full‑chip level Static Timing Analysis, timing‑constraint development, and multi‑mode, multi‑corner timing closure factoring in process variations, IR drop, and Xtalk.
• Expertise and in‑depth knowledge of industry‑standard EDA tools.
• Proficiency in Python, Tcl, Perl, Make, or similar scripting languages as well as AI/ML/DL/LLMs.

Ways to stand out from the crowd:

• Physical design experience on high‑performance CPUs, GPUs, LPUs, or AI accelerator designs.
• Expertise or innovation in advanced physical design & circuits optimizations, clocking, or timing‑closure strategies.
• Experience in developing scalable optimization and signoff solutions through automation or AI/Agentic framework.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until October 3, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/ #LI-Hybrid

NVIDIA pioneered accelerated computing. Today, our AI infrastructure powers global intelligence, transforming every industry. Learn more about NVIDIA.