Senior Physical Design and Timing Engineer

NVIDIA Corporation; Santa Clara (CA); Hybrid; USD 136,000 - 265,000; Full time

Benefits offered by this job

Equity

Benefits

Hybrid work model

Job summary

NVIDIA Corporation is seeking a Senior Physical Design and Timing Engineer in Santa Clara, CA. You will drive high-frequency and low-power design across CPUs, GPUs, LPUs, and SoCs, collaborating with multiple teams to deliver robust tapeouts.

The role requires advanced timing knowledge, scripting skills, and hands-on experience from RTL to tapeout, with a focus on power, performance, and area optimization.

Qualifications

• BS in Electrical or Computer Engineering with 5+ years, or MS with 3+ years.
• Hands-on experience from RTL to tapeout including synthesis and ECOs.
• Proven ability to improve power, performance, and area.
• STA and timing-closure experience under PVT variations.
• Proficiency with Python, Tcl, Perl, Make, and AI/ML/DL/LLMs.

Responsibilities

• Drive physical design and timing for CPUs, GPUs, LPUs, and SoCs at block/cluster/chip levels.
• Support frontend/backend from RTL to gds2, including synthesis, floorplanning, timing, and ECOs.
• Collaborate with cross-functional teams to optimize design and signoff.

Skills

Physical design

Timing analysis

RTL to tapeout

EDA tools

Python scripting

Education

BS or MS in Electrical/Computer Engineering

Tools

EDA tools

Job description

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

We are now looking for a motivated Senior Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great, join us today! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing! More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities which are hard to tackle, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human inventiveness and intelligence.

What you'll be doing:

• Drive physical design and timing of high-frequency and low-power NVIDIA CPUs, GPUs, LPUs and SoCs at block level, cluster level, and/or full chip level.
• Help in driving frontend and backend implementation from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation.
• Work in a cross-functional environment interacting with multiple teams.

What we need to see:

• BS (or equivalent experience) in Electrical or Computer Engineering with 5+ years of experience, or MS (or equivalent experience) with 3+ years of experience in physical design, synthesis, and timing.
• Strong hands-on experience taking complex blocks, IPs, or chips from RTL/netlist to tapeout through logic synthesis, floorplanning, placement, clock-tree synthesis, routing, physical optimization, signoff, and ECOs.
• Demonstrated success improving power, performance, and area through design improvements, critical-path planning and crafting, or methodology/workflow improvements.
• Hands-on experience in block, sub-chip, and full-chip level Static Timing Analysis, timing-constraint development, and multi-mode, multi-corner timing closure factoring in process variations, IR drop, and Xtalk.
• Expertise and in-depth knowledge of industry-standard EDA tools.
• Proficiency in Python, Tcl, Perl, Make, or similar scripting languages as well as AI/ML/DL/LLMs.

Ways to stand out from the crowd:

• Physical design experience on high-performance CPUs, GPUs, LPUs, or AI accelerator designs.
• Expertise or innovation in advanced physical design & circuits optimizations, clocking, or timing-closure strategies.
• Experience in developing scalable optimization and signoff solutions through automation or AI/Agentic framework.

NVIDIA is widely considered to be the leader of AI computing, and one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you.

Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/

#LI-Hybrid

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are: 136,000 USD–218,500 USD for Level3; and168,000 USD–264,500 USD for Level4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November6,2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.