Senior Performance Modeling Engineer - AI Hardware

Socket.dev; Santa Clara (CA); On-site; USD 170,000 - 250,000; Full time

Benefits offered by this job

Health, Dental, Vision coverage

401(k) match

Equity grant

Relocation assistance

Visa sponsorship

Job summary

Socket.dev seeks a Member of Technical Staff to develop functional and performance models for its scale-up memory expansion device for AI accelerators. You will collaborate with the silicon architecture team to validate performance assumptions, explore design tradeoffs, and identify bottlenecks early in development.

This onsite role in Santa Clara, CA or Boston, MA emphasizes reasoning from first principles and co-exploring the design space as hardware and software evolve together.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a closely related field.
• 5–10+ years of experience in performance modeling for data movement devices: NICs, memory expansion cards (e.g. CXL), IPU/DPU, NoC.
• Ability to reason across multiple abstraction layers, from architectural details to system-level performance behavior.

Responsibilities

• Build and maintain system-level (e.g., rack-scale) and chip-level performance models for high-bandwidth data movement between devices operating in the scale-up domain.
• Model workloads from software memory access patterns through data distribution in the network and all the way down to on-device memory channels.
• Work day-to-day with silicon architects, system designers, and workload owners to align performance expectations and constraints.
• Identify performance bottlenecks, scaling limits, and sensitivity points across compute, memory, and interconnects in end-to-end workload settings.
• Clearly communicate modeling assumptions, limitations, and conclusions to both technical and non-specialist stakeholders.

Skills

Performance modeling

Cross-layer reasoning

Education

Bachelor’s or Master’s degree in Electrical/Computer Engineering

Tools

CUDA VMM

NVLink

Job description

Socket.dev seeks a Member of Technical Staff to develop functional and performance models for its scale-up memory expansion device for AI accelerators. You will collaborate with the silicon architecture team to validate performance assumptions, explore design tradeoffs, and identify bottlenecks early in development.

This onsite role in Santa Clara, CA or Boston, MA emphasizes reasoning from first principles and co-exploring the design space as hardware and software evolve together.