Senior Optical Engine Validation Engineer

CScale; Palo Alto (CA); On-site; USD 150,000 - 250,000; Full time

Job summary

CScale is building the interconnect for gigawatt-scale AI in Palo Alto. We seek a senior engineer to bring up and validate integrated optical engines, defining what proves “proven” at engine and module levels, and driving test methodology from first light through EVT, DVT, PVT, and qualification.

You will own validation plans, oversee package/module bring-up across revisions, and characterize electrical and optical interfaces to IEEE 802.3 standards.

Qualifications

• Bachelor's degree in Electrical Engineering, Optical Engineering, Physics, or a related field with 8+ years of experience in optical transceiver, module, or high-speed link validation; MS preferred.
• Transceiver hardware design background — you have designed, or worked shoulder to shoulder with the designers of, optical module hardware
• Hands-on experience with BERTs, sampling and real-time oscilloscopes, DCAs, OSAs, and optical power and attenuation equipment
• Deep knowledge of PAM4 signal quality metrics, including TDECQ, SRS, jitter and noise decomposition, and BER analysis
• Fluency in IEEE 802.3 electrical and optical specifications and how compliance is demonstrated
• Proven ownership of a validation program through DVT and PVT on a product that shipped
• Strong Python skills for test automation and data analysis, with a working knowledge of statistical methods and process control
• Strong ownership mindset with the ability to work in ambiguous and dynamic environments

Responsibilities

• Own optical engine bring-up, testing, and validation, including validation plans, EVT/DVT/PVT test matrices, entry and exit criteria, and readiness reviews
• Lead integrated package and module bring-up for each new revision — power sequencing, thermal behavior, management interface, and first light — with firmware, packaging, and board teams
• Characterize the host-side electrical interface at high-speed PAM4 rates against IEEE 802.3 requirements: eye diagrams, jitter decomposition, SNDR, and COM
• Characterize the optical interface against IEEE 802.3 optical requirements: TDECQ, extinction ratio, OMA, launch power, wavelength, sensitivity, stressed receiver sensitivity, and overload
• Perform end-to-end electro-optic link testing over the specified reach, and build BER and Q-factor methodology including extrapolation to very low error rates
• Characterize performance across temperature, supply, and process corners, and validate equalization and link adaptation behavior under stress conditions
• Perform interoperability testing with host platforms and third-party modules and test equipment
• Drive failures to root cause across electrical, optical, thermal, firmware, and test-setup causes, separating component, silicon, package, and board issues
• Collaborate with design, packaging, and reliability teams on trade-offs and specification adjustments that balance performance, manufacturability, and schedule
• Support new product introduction by transferring test methods and limits to manufacturing test
• Build and automate test stations so characterization runs are repeatable, versioned, and trustworthy months later
• Author customer-facing characterization reports and compliance evidence, and mentor engineers and technicians

Skills

BERTs & oscilloscopes

Python for test automation

PAM4 signal quality

IEEE 802.3 knowledge

Education

Bachelor's degree in Electrical/ Optical Eng

MS preferred

Tools

BERTs

OSAs

DCAs

Optical power meters

Job description

CScale is building the interconnect for gigawatt-scale AI. As AI scale-up moves toward deployments spanning thousands of accelerators and dozens of racks, the network needs to deliver high bandwidth, predictable low latency, and continuous communication. CScale is building integrated optical interconnect designed for this new scale, enabling accelerators to work together like a single, much larger computer. But at this scale, performance is only part of the challenge. Optical failures are inevitable, and the system needs to keep running. CScale is designing the interconnect for continuity. Lasers will fail. Compute shouldn’t. The ambition is simple: Build AI interconnect you can take for granted. CScale came out of stealth in September 2026 with $145 million in Series C funding, bringing total funding to $188 million.

We are looking for a senior engineer to bring up and validate our integrated optical engines — the point where lasers, photonics, CMOS, and packaging come together into a working product. You will decide what "proven" means at the engine and module level, build the electro-optic link test methodology, and carry each hardware revision from first light through EVT, DVT, PVT, and qualification.

Responsibilities

• Own optical engine bring-up, testing, and validation, including validation plans, EVT/DVT/PVT test matrices, entry and exit criteria, and readiness reviews
• Lead integrated package and module bring-up for each new revision — power sequencing, thermal behavior, management interface, and first light — with firmware, packaging, and board teams
• Characterize the host-side electrical interface at high-speed PAM4 rates against IEEE 802.3 requirements: eye diagrams, jitter decomposition, SNDR, and COM
• Characterize the optical interface against IEEE 802.3 optical requirements: TDECQ, extinction ratio, OMA, launch power, wavelength, sensitivity, stressed receiver sensitivity, and overload
• Perform end-to-end electro-optic link testing over the specified reach, and build BER and Q-factor methodology including extrapolation to very low error rates
• Characterize performance across temperature, supply, and process corners, and validate equalization and link adaptation behavior under stress conditions
• Perform interoperability testing with host platforms and third-party modules and test equipment
• Drive failures to root cause across electrical, optical, thermal, firmware, and test-setup causes, separating component, silicon, package, and board issues
• Collaborate with design, packaging, and reliability teams on trade-offs and specification adjustments that balance performance, manufacturability, and schedule
• Support new product introduction by transferring test methods and limits to manufacturing test
• Build and automate test stations so characterization runs are repeatable, versioned, and trustworthy months later
• Author customer-facing characterization reports and compliance evidence, and mentor engineers and technicians
  
  

Qualifications

• Bachelor's degree in Electrical Engineering, Optical Engineering, Physics, or a related field with 8+ years of experience in optical transceiver, module, or high-speed link validation; MS preferred
• Transceiver hardware design background — you have designed, or worked shoulder to shoulder with the designers of, optical module hardware
• Hands-on experience with BERTs, sampling and real-time oscilloscopes, DCAs, OSAs, and optical power and attenuation equipment
• Deep knowledge of PAM4 signal quality metrics, including TDECQ, SRS, jitter and noise decomposition, and BER analysis
• Fluency in IEEE 802.3 electrical and optical specifications and how compliance is demonstrated
• Proven ownership of a validation program through DVT and PVT on a product that shipped
• Strong Python skills for test automation and data analysis, with a working knowledge of statistical methods and process control
• Strong ownership mindset with the ability to work in ambiguous and dynamic environments
  
  

Preferred Qualifications

• Silicon photonics or co-packaged optics experience
• Knowledge of FEC and validating against post-FEC BER targets; familiarity with CMIS and module management interfaces
• Experience with WDM link characterization
• Experience taking optical modules through NPI into volume production
• Reliability exposure: HTOL, accelerated aging, and Telcordia GR-468
  
  

Compensation includes a base salary of $150,000–$250,000 and equity in CScale. Final offers depend on experience, market conditions and location.