Senior Neuromorphic Verification Engineer

Intel; Austin (TX); Hybrid; USD 150,000 - 210,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Vacation

Job summary

Intel’s Neuromorphic Computing Lab seeks experienced pre-silicon verification engineers to drive innovation at the intersection of semiconductor tech, physical AI, and next-generation computing architectures. You’ll develop verification methodologies across software, RTL, and emulation, ensuring correctness from unit tests to chip-level validations.

Ideal candidates bring strong UVM experience, test planning to execution, and a mindset for learning asynchronous design techniques and AI-driven

Qualifications

• BS +5 years or MS +3 years in silicon engineering.
• 3+ years of pre-silicon verification or post-silicon validation in SoC accelerators or custom ASIC designs.
• 3+ years of experience in UVM and constrained random verification methods.
• 2+ years of experience developing entire verification stack from test planning to execution, coverage, emulation, post-silicon.
• 1+ year of experience using AI tools for test generation, debugging and productivity.

Responsibilities

• Map application-level requirements to unit- and system-level test plans.
• Write Python-based directed and random tests for design partitions and chip-level.
• Run regressions, debug test failures, track coverage and work with designers to fix failures and improve coverage.
• Maintain assertions, scoreboards and tools/flows developed.
• Integrate VIPs and coordinate with IP teams to ensure protocol requirements are met.

Skills

Pre-silicon verification

Post-silicon validation

Python scripting

Test planning

Coverage analysis

AI-assisted verification

Education

Bachelor's degree in Electrical Engineering or related

Master's degree in Electrical Engineering or related

Tools

UVM

Emulation platforms

Job description

Intel’s Neuromorphic Computing Lab seeks experienced pre-silicon verification engineers to drive innovation at the intersection of semiconductor tech, physical AI, and next-generation computing architectures. You’ll develop verification methodologies across software, RTL, and emulation, ensuring correctness from unit tests to chip-level validations.

Ideal candidates bring strong UVM experience, test planning to execution, and a mindset for learning asynchronous design techniques and AI-driven