Senior MLIR Compiler Engineer for AI Silicon

Ericsson GmbH; Austin (TX); On-site; USD 140,000 - 190,000; Full time

Benefits offered by this job

Health benefits

401(k) plan

Paid time off

Parental leave

Job summary

Ericsson GmbH in Austin, Texas seeks a Senior Compiler Engineer to design and implement MLIR passes and optimizations for a custom AI silicon stack. You will work across the compiler stack with hardware architects and AI researchers on model import, scheduling, memory planning, and code generation for real hardware.

You will contribute to transformations, lowerings, and verification, ensuring correctness on multi-core accelerators.

Qualifications

• Strong C++ development experience.
• Hands-on experience with MLIR/LLVM or another production compiler framework.
• Experience implementing compiler passes or transformations at production quality.

Responsibilities

• Design and implement MLIR transformation passes, dialect conversions, and lowering pipelines.
• Work on tiling, scheduling, vectorization, and memory-planning for the target hardware.
• Debug numerical correctness across compiler transformations.
• Develop and maintain compiler testing and validation infrastructure.
• Contribute to hardware-software co-design discussions as the compiler mather.
• Profile, analyze, and optimize workloads on silicon.
• Own the design and implementation of major compiler subsystems.

Skills

Strong C++ development

MLIR/LLVM experience

Production-grade compiler work

IR & compiler pipeline knowledge

Cross-boundary problem solving

Tools

MLIR

LLVM

C++ tooling

Model lowering

Job description

Ericsson GmbH in Austin, Texas seeks a Senior Compiler Engineer to design and implement MLIR passes and optimizations for a custom AI silicon stack. You will work across the compiler stack with hardware architects and AI researchers on model import, scheduling, memory planning, and code generation for real hardware.

You will contribute to transformations, lowerings, and verification, ensuring correctness on multi-core accelerators.