Senior ML Accelerator IP Validation Engineer

Meta; Redmond (WA); On-site; USD 178,000 - 250,000; Full time

Benefits offered by this job

Bonus

Equity

Benefits

Job summary

Meta Reality Labs is seeking an IP Validation Engineer focused on machine learning accelerators. You will bring up ML workloads across emulation, prototyping, and silicon, validating hardware/software integration and optimizing performance, power, and robustness of state-of-the-art ML accelerators.

You will collaborate with RTL design, verification, emulation, architecture, ML compiler, firmware/runtime, and system teams to define validation requirements, develop test plans, and drive issues to

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, or related field.
• 8+ years of relevant experience in consumer electronics or related fields.
• Experience creating validation plans for hardware products.
• Experience with HW-SW integration and validation of ML accelerators or related IP.
• Experience with common SOC HW interfaces AXI, APB, AHB, OCP.
• Experience troubleshooting with vendors on test escapes.

Responsibilities

• Define and execute HW-SW integration and validation plans for ML accelerator IP across emulation and silicon.
• Identify risks and develop mitigation strategies.
• Define performance-power characterization and test plans for new features.
• Participate in design reviews and influence test strategy.
• Create test setups and analyze data to debug issues.
• Collaborate with RTL, verification, emulation, architecture, ML compiler, firmware/runtime, and system teams to validate workloads.
• Summarize data insights for stakeholders.

Skills

HW-SW integration

Debugging

Data analysis

Cross-functional teamwork

Test planning

Education

Bachelor's degree in Computer Science, Computer Engineering or related field

Tools

AXI

APB

AHB

OCP

Job description

Meta Reality Labs is seeking an IP Validation Engineer focused on machine learning accelerators. You will bring up ML workloads across emulation, prototyping, and silicon, validating hardware/software integration and optimizing performance, power, and robustness of state-of-the-art ML accelerators.

You will collaborate with RTL design, verification, emulation, architecture, ML compiler, firmware/runtime, and system teams to define validation requirements, develop test plans, and drive issues to