Senior Mixed-Signal AMS CAD Lead

Apple, Inc.; Jackson (TN); Presencial; USD 176 000 - 312 000; Tempo integral

Vantagens oferecidas por esta oferta de emprego

Employee stock programs

Tuition reimbursement

Relocation assistance

Medical and dental coverage

Resumo da oferta

Apple, Inc. is seeking a senior engineer and technical leader to own AMS simulation methodology across analog, RF, and mixed-signal design teams.

You will architect, lead, and evolve modeling, verification, and co-simulation flows, collaborating closely with engineers to deliver validated IP in silicon. The role requires hands-on leadership, deep CAD expertise, and a track record of delivering scalable solutions.

Qualificações

• Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or related field.
• 10+ years of AMS (Analog Mixed-Signal) industry experience.
• Strong proficiency in Python, Perl, C/C++, or TCL.
• Hands-on experience with mixed-signal co-simulation tools and methodologies.

Responsabilidades

• Own and define the direction/roadmap for a state-of-the-art mixed-signal simulation methodology.
• Serve as primary technical authority for design teams, ensuring functional behavior and interface integrity.
• Lead adoption of CAD automations and cross-project impact.
• Manage relationships with third-party EDA tool vendors and requirements.
• Mentor junior engineers and lead small CAD software teams on projects.

Conhecimentos

AMS simulation methodology

Co-simulation/workflows

Mentoring/leadership

Python/C/C++/TCL

SystemVerilog/Verilog/VHDL

Formação académica

Bachelor's degree in CS/EE/CE or related

Ferramentas

Cadence Xcelium/Verisium/Indago/AMS Designer

Synopsys VCS/Verdi

Siemens Questa/Symphony

Descrição da oferta de emprego

Apple, Inc. is seeking a senior engineer and technical leader to own AMS simulation methodology across analog, RF, and mixed-signal design teams.

You will architect, lead, and evolve modeling, verification, and co-simulation flows, collaborating closely with engineers to deliver validated IP in silicon. The role requires hands-on leadership, deep CAD expertise, and a track record of delivering scalable solutions.