Senior Hardware SoC Architect

NVIDIA Gruppe; Santa Clara (CA); On-site; USD 152,000 - 241,500; Full time

Job summary

NVIDIA Gruppe is seeking a Senior Hardware SoC Architect in Santa Clara to define next-generation SoC architectures that integrate GPUs and custom processors. The successful candidate will collaborate across teams and focus on clock, reset, and power management methodologies.

Ideal candidates will have a BS/MS in EE/CE, extensive experience in ASIC design, and strong skills in SystemC, C++, and scripting. The position offers a competitive salary range: $152,000–$241,500 for Level 3 or $184,000–$287,500 for Level 4.

Qualifications

• 3+ years of industry experience.
• Deep knowledge of microarchitecture.
• First-hand knowledge of ASIC design and verification.

Responsibilities

• Define clock and reset architecture based on IP and product requirements.
• Collaborate with various teams to capture requirements.
• Develop and improve architectural C-models.

Skills

SystemC modeling

C++

Scripting in Perl or Python

Clock generation and distribution knowledge

Analytical problem-solving skills

Education

BS/MS in EE/CE or equivalent experience

Job description

About the Role

We are seeking a Senior Hardware SoC Architect to help define next‑generation SoC architectures that combine NVIDIA GPUs, custom processors and accelerators. The role is cross‑disciplinary, working with software, ASIC design, verification, physical design, VLSI and platform teams. The focus is on advancing technology while making strong engineering trade‑offs.

Clock and Reset Architecture Team

As a member of the Clock and Reset Architecture Team, you’ll focus on clocks, resets and power management for SOCs. The role requires a strong background in SystemC modeling, scripting, and a passion for improving methodologies and automation to boost team efficiency.

Responsibilities

• Define clock and reset architecture based on IP and product requirements.
• Collaborate with IP architects, designers, verification, physical design, software, DFT, security, automotive safety and other teams.
• Capture requirements in architecture documents and lead review sessions.
• Develop and improve architectural C‑models and support teams that use them.
• Review upstream and downstream specifications and verification plans.
• Implement methodologies to enhance team efficiency and output quality.

Qualifications

• BS/MS in EE/CE (or equivalent experience) plus 3+ years of industry experience.
• Deep knowledge of clock generation, distribution, and microarchitecture.
• Good understanding of computer architecture.
• First‑hand knowledge of ASIC design, verification and implementation flows.
• Strong C++/SystemC experience.
• Excellent written, verbal and negotiation skills.
• Expert analytical and independent problem‑solving skills.
• Strong scripting skills in Perl or Python.
• Experience with architectural methodology, flows and processes.

Preferred Experience

• Clock and reset architecture definition or architectural C‑model experience.
• Detailed knowledge of PLLs, DLLs, clock‑related signal integrity effects, or platform power and reset sequencing.
• Hands‑on work with reset generation and distribution.
• Automotive functional safety experience with ISO26262 standard.

Benefits

Base salary range: $152,000–$241,500 (Level3) or $184,000–$287,500 (Level4). Eligibility for equity and benefits.

Application Deadline

Applications will be accepted until March20, 2026.

EEO Statement

NVIDIA is committed to fostering a diverse work environment and is a proud equal‑opportunity employer. We do not discriminate based on race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.