Senior Hardware Engineer - 800G Networking (Onsite SJ)

Capgemini Engineering; San Jose (CA); On-site; USD 73,000 - 174,000; Full time

Benefits offered by this job

401(k) matching

Medical, dental, vision

Paid time off

Job summary

Capgemini Engineering in the United States (San Jose, CA) is seeking a Senior Hardware Engineer to lead architecture, design, validation, and performance optimization for next-generation networking platforms including 800G interfaces.

You will collaborate with software, PCB layout, mechanical, and validation teams to deliver high-speed routers and switches, manage pre/post-layout SI/PI analyses, power integrity, and board bring-up from architecture to product validation.

Qualifications

• Seven+ years of experience in network hardware engineering or related high-speed electronic systems.
• Bachelor’s degree in electrical engineering or equivalent.
• Strong experience with high-speed interfaces (DDR, SERDES, PCIe) and 800G networking.

Responsibilities

• Develop hardware architectures for next-generation routers and switches.
• Lead requirements analysis, high-level design, schematic capture, and component selection.
• Perform pre-layout and post-layout signal-integrity analysis and power-integrity checks.
• Conduct thermal analyses, stress testing, and board bring-up.
• Collaborate with software, PCB layout, mechanical, and validation teams.

Skills

High-speed hardware design

Network hardware architectures

DDR/SERDES/PCIe expertise

PCB stack-up / SI

Education

Bachelor’s degree in Electrical Engineering

Tools

Schematic capture tools

PCB layout tools

Signal integrity analysis tools

Job description

Capgemini Engineering in the United States (San Jose, CA) is seeking a Senior Hardware Engineer to lead architecture, design, validation, and performance optimization for next-generation networking platforms including 800G interfaces.

You will collaborate with software, PCB layout, mechanical, and validation teams to deliver high-speed routers and switches, manage pre/post-layout SI/PI analyses, power integrity, and board bring-up from architecture to product validation.