Senior Hardware Design Engineer (Hybrid)

Kforce Inc; Tempe (AZ); Hybrid; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical/Dental/Vision insurance

HSA

FSA

401(k)

Life & Disability Insurance

Paid time off (Salaried)

Paid sick leave (Service Contract Act)

Job summary

Kforce's client in Tempe, AZ is seeking a Senior Hardware Design Engineer to join a highly talented and collaborative engineering team developing innovative, mission-driven hardware for space applications, with end-to-end ownership across the hardware development lifecycle.

The role emphasizes hands-on design and rapid problem solving, expects a Bachelor's or Master's in Electrical Engineering with 5+ years of high-speed digital hardware experience, space-grade knowledge, and offers a flexible

Qualifications

• Requires Bachelor's or Master's in Electrical Engineering.
• 5+ years designing high-speed digital hardware at the board level.
• Experience with space-grade hardware is highly desirable.

Responsibilities

• Lead board-level design of high-speed digital hardware for space applications.
• Define FPGA architecture and SoC integration across the hardware platform.
• Apply space-grade design, reliability, and qualification practices.
• Collaborate with a cross-functional engineering team to drive designs.
• Own architecture-to-flight-qualification of challenging designs.
• Troubleshoot complex digital hardware in a hands-on environment.

Skills

High-speed digital hardware design

Board-level design

FPGA architecture

SoC integration

Space hardware knowledge

Troubleshooting & debugging

Education

Bachelor's or Master's degree in Electrical Engineering

Tools

Mentor Xpedition

Cadence

Job description

Kforce's client in Tempe, AZ is seeking a Senior Hardware Design Engineer to join a highly talented and collaborative engineering team developing innovative, mission-driven hardware for space applications. This role offers the opportunity to contribute to challenging, high-impact projects with end-to-end ownership across the hardware development lifecycle. Flexible hybrid work model designed to support collaboration and work-life balance.

Responsibilities

• Lead board-level design of high-speed digital hardware for space applications
• Define FPGA architecture and SoC integration across the hardware platform
• Apply space-grade hardware design, reliability, and qualification practices
• Work alongside a highly talented, collaborative engineering team
• Take ownership of challenging designs from architecture through flight qualification
• Solve complex technical problems in a hands-on, highly technical environment

Requirements

• Bachelor's or Master's degree in Electrical Engineering
• 5+ years of experience designing high-speed digital hardware at the board level
• Knowledge of schematic capture tools such as Mentor Xpedition or Cadence
• FPGA architecture definition and SoC integration experience
• Knowledge of space, aerospace, or other flight-qualified hardware
• Strong hands-on troubleshooting and debug skills with complex digital hardware

Pay

The pay range is the lowest to highest compensation we reasonably in good faith believe we would pay at posting for this role. We may ultimately pay more or less than this range. Employee pay is based on factors like relevant education, qualifications, certifications, experience, skills, seniority, location, performance, union contract and business needs. This range may be modified in the future.

Benefits

• medical/dental/vision insurance
• HSA
• FSA
• 401(k)
• life, disability & ADD insurance to eligible employees
• Salaried personnel receive paid time off
• Hourly employees are not eligible for paid time off unless required by law
• Hourly employees on a Service Contract Act project are eligible for paid sick leave

This job is not eligible for bonuses, incentives or commissions.

Kforce is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender identity, national origin, age, protected veteran status, or disability status.