Senior GPU Verification Engineer (SystemVerilog/UVM)

MaC VC; San Diego (CA); On-site; USD 170,000 - 254,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a GPU verification engineer to architect, design, implement and verify the structure and performance of GPU hardware, drivers, features, applications and tools.

You will create and maintain verification test benches (SystemVerilog/UVM), collaborate with Architecture, Software, Firmware and Design teams, and contribute to pre- and post-silicon validation to meet performance and power goals.

Qualifications

• Bachelor's degree with 4+ years in software/hardware engineering or related field.
• Experience with SystemVerilog, UVM, Verilog or VHDL for verification.
• Strong C/C++ skills and scripting.
• GPU verification experience is highly preferred.

Responsibilities

• Applies graphics knowledge to architect, design, implement and verify GPU hardware, drivers, features, applications and tools.
• Creates and maintains verification test benches and environments in SystemVerilog/UVM.
• Collaborates with Architecture, Software, Firmware, Design, Modeling, Emulation and Post-silicon validation teams to define and develop test methodology and content.
• Participates in GPU architecture and micro-architecture reviews.
• Collects, organizes and executes system-level test content including benchmarks and standards compliance testsuites.

Skills

SystemVerilog

UVM

Verilog

VHDL

C/C++

GPU verification

Education

Bachelor's degree in Electrical/Computer Engineering or related field

Master's degree or PhD in related field

Tools

SystemVerilog/UVM frameworks

Emulation platforms (Veloce, Palladium, Zebu)

Python scripting

Job description

Qualcomm Technologies, Inc. is seeking a GPU verification engineer to architect, design, implement and verify the structure and performance of GPU hardware, drivers, features, applications and tools.

You will create and maintain verification test benches (SystemVerilog/UVM), collaborate with Architecture, Software, Firmware and Design teams, and contribute to pre- and post-silicon validation to meet performance and power goals.