Senior GPU Power Architect - Energy-Efficient AI Compute

NVIDIA; Santa Clara (CA); On-site; USD 168,000 - 311,000; Full time

Job summary

NVIDIA is seeking a Senior Applied Power Architect - GPU to lead power/energy-efficiency efforts for next-generation AI architectures in Santa Clara. You will invent methodologies, drive PDN and power integrity work, and collaborate with ASIC, packaging, and product teams to optimize performance within thermal and electrical constraints.

The role requires strong background in low-power architectures, 6+ years in system design, and hands-on lab experience with power measurement tools.

Qualifications

• MSEE/MSCE, preferably PhD, or equivalent with a specialization in low-power-processor architectures.
• 6+ years of experience in energy-efficient system design, performance/power modeling and tradeoffs.
• Background in PDN design and understanding of Di/Dt, undershoot/overshoot, IR, EM, peak current; mitigation helpful.
• Experience with Python and data analysis libraries (Pandas, NumPy, PyTorch) a plus.
• Lab familiarity with power measurement equipment (scope/DAQ) and ability to analyze board-level power issues.
• Strong interpersonal and organizational skills and teamwork.

Responsibilities

• Invent methodologies and techniques to address electrical, speed, and power challenges for next-gen AI architectures.
• Drive power management initiatives to optimize power efficiency and performance within constraints.
• Understand process characteristics and analyze V-F tradeoffs with VT choices on power and performance.
• Investigate multi-die technologies and propose packaging, interconnect, thermal, and electrical solutions.
• Analyze peak current, Di/Dt, IR and EM; collaborate with ASIC designers, Power Integrity, Packaging, and Product engineers.

Skills

Power architecture

PDN design fundamentals

Electrical issues analysis

Python

Data analysis (Pandas/NumPy)

PyTorch

Education

MSEE/MSCE/PhD

Tools

Oscilloscope

DAQ hardware

Job description

NVIDIA is seeking a Senior Applied Power Architect - GPU to lead power/energy-efficiency efforts for next-generation AI architectures in Santa Clara. You will invent methodologies, drive PDN and power integrity work, and collaborate with ASIC, packaging, and product teams to optimize performance within thermal and electrical constraints.

The role requires strong background in low-power architectures, 6+ years in system design, and hands-on lab experience with power measurement tools.