Senior GPU Performance Engineer - Low-Level AI Kernels

Intel Corporation; Hillsboro (OR); Hybrid; USD 195,000 - 276,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Job summary

Intel Corporation in Hillsboro, Oregon is seeking a software engineer to contribute to oneDNN low-level optimization and GPU kernel development. The role focuses on optimizing math primitives and parallel algorithms for AI workloads on Intel hardware.

You will design JIT/codegen infrastructure, implement fusion and memory-traffic optimizations, and collaborate with hardware and compiler teams to shape future accelerator capabilities.

Qualifications

• BSc, MSc, or PhD in CS/CE/Math/Physics or related field.
• 5+ years of professional software development with modern C++.
• 2+ years of GPU/kernel optimization experience (CUDA/OpenCL/SYCL/HIP).
• Strong knowledge of computer architecture and SIMD.

Responsibilities

• Develop high-performance GEMM, convolution, and attention kernels for AI workloads.
• Design scalable JIT and codegen infrastructure for GPU kernel generation.
• Implement fusion and memory-traffic optimizations to maximize hardware utilization.
• Optimize mixed-precision and quantized execution paths (BF16, FP16, INT8, FP8, FP4).
• Profile and eliminate performance bottlenecks across GPU primitives and runtime paths.
• Co-design GPU primitives and kernel architectures for next-generation Intel GPUs.
• Partner with hardware and compiler teams to shape accelerator capabilities and software stacks.
• Improve validation, benchmarking, and CI infrastructure for performance-critical GPU workloads.

Skills

C++ expert

GPU kernel optimization

Computer architecture

Parallel programming

Education

BSc/MSc/PhD in CS/CE/Math/Physics

Tools

SYCL/DPC++/OpenCL/CUDA/HIP

Job description

Intel Corporation in Hillsboro, Oregon is seeking a software engineer to contribute to oneDNN low-level optimization and GPU kernel development. The role focuses on optimizing math primitives and parallel algorithms for AI workloads on Intel hardware.

You will design JIT/codegen infrastructure, implement fusion and memory-traffic optimizations, and collaborate with hardware and compiler teams to shape future accelerator capabilities.