Senior GPU HPC Architect for AI/ML Compute Platforms

Jobtailor; California (MO); On-site; USD 180,000 - 260,000; Full time

Job summary

Jobtailor is seeking a senior architect to design scalable compute platforms for AI/ML, simulation, and high-throughput workloads. You will define platform standards, map workloads to capabilities across bare metal and cloud, and guide hardware and firmware decisions.

You will lead validation and performance characterization, mentor engineers, and drive optimization of density, power, and cost. Deep expertise in CPU/GPU architectures and HPC fabrics is required.

Qualifications

• Proven experience (7+ years) architecting large-scale 10k-100k+ GPU HPC or cloud compute platforms.
• Deep knowledge of CPU/GPU architectures, memory hierarchies, and accelerator topologies.
• Experience designing systems around high-bandwidth, low-latency fabrics (NVLink, InfiniBand, RoCE).
• Strong understanding of system performance tuning, resource scheduling, thermal and power optimization, and compute lifecycle management.
• Comfortable working across hardware and software boundaries, especially at the intersection of compute architecture, OS behavior, and orchestration layers.
• Skilled at balancing architectural tradeoffs for density, power efficiency, cooling, and performance.
• Strong analytical and communication skills, with a track record of influencing technical strategy across teams.
• Strong ownership and can-do attitude, self-starter who feels comfortable working in ambiguity.
• Hands-on experience with AI/ML workloads and their compute performance characteristics (nice to have).
• Familiarity with orchestration tools used in HPC, such as Slurm and Kubernetes (nice to have).
• Experience with virtualization technologies, specifically GPU virtualization (nice to have).
• Exposure to hardware validation, vendor collaboration, and long-term OEM roadmap alignment (nice to have).
• Background in compute telemetry, real-time performance profiling, or large-scale A/B infrastructure testing (nice to have).
• Legally authorized to work in the United States

Responsibilities

• Architect and define scalable compute platforms optimized for AI/ML, simulation, and high-throughput workloads
• Develop compute system standards and design patterns to ensure consistency, performance, and maintainability across infrastructure
• Evaluate emerging CPU, GPU, and accelerator technologies, owning architectural tradeoff decisions affecting compute density, power, cooling, and total cost
• Collaborate with product and engineering teams to map workload requirements to compute platform capabilities across bare metal and cloud deployments
• Convert ambiguous business or customer needs into measurable platform requirements, technical specifications, acceptance criteria, and architecture decisions
• Define compute platform roadmaps and architectural reference designs guiding hardware selection, firmware baselines, rack-level, and cluster design
• Act as a technical lead during new platform introductions, guiding validation and performance characterization efforts
• Mentor systems engineers and cross-functional stakeholders on compute performance tuning, sizing, and architectural decisions

Skills

GPU HPC

CPU Architecture

Performance Tuning

Resource Scheduling

Thermal Optimization

Power Optimization

Lifecycle Management

Architectural Tradeoffs

Validation & Testing

Telemetry

Real-Time Profiling

Influencing Strategy

Communication

Ownership

Self-Starter

Kubernetes

Slurm

NVLink

InfiniBand

RoCE

GPU Virtualization

Tools

NVLink

InfiniBand

RoCE

Slurm

Kubernetes

GPU Virtualization

Job description

Jobtailor is seeking a senior architect to design scalable compute platforms for AI/ML, simulation, and high-throughput workloads. You will define platform standards, map workloads to capabilities across bare metal and cloud, and guide hardware and firmware decisions.

You will lead validation and performance characterization, mentor engineers, and drive optimization of density, power, and cost. Deep expertise in CPU/GPU architectures and HPC fabrics is required.