Senior GPU Compiler Engineer — End-to-End MLIR & CUDA

San Francisco Tensor Company

San Francisco (CA)

On-site

USD 285,000 - 315,000

Full time

11 days ago

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Benefits offered by this job

Relocation assistance
Office in San Francisco

Job summary

San Francisco Tensor Company is seeking a Member of Technical Staff for GPU Compiler Engineering to build the machine that searches and to optimize the entire pipeline from StableHLO ingestion to backend code generation. You will work on MLIR dialects, LLVM backend, and cross-architecture targets to push high-throughput AI workloads.

Join a small, hands-on team in San Francisco focused on research-driven compiler innovation with direct impact on large-scale compute, including mobility of

Qualifications

  • Deep experience in compiler infrastructure (LLVM/MLIR).
  • Strong background in GPU architecture and low-level optimization (CUDA/ROCm).
  • Hands-on experience with at least one GPU ISA (PTX/SASS, GCN/RDNA).
  • Familiar with ML compiler stacks (XLA, TVM, Triton, torch.compiler).
  • Solid systems programming skills in C++ and/or Rust.
  • Proven track record of production-grade compiler infrastructure.

Responsibilities

  • Build and extend MLIR dialects and passes to optimize training and inference workloads.
  • Work in our LLVM backend, on instruction selection, scheduling, register allocation and cubin emission.
  • Expand our search-based compiler infrastructure with agent- and RL-driven program search and formal proofs.
  • Implement classic compiler optimizations tuned for large-scale training.
  • Create hybrid codegen paths for cases where direct MLIR lowering isn't practical.
  • Own testing, benchmarking and performance regression systems, including bit-identical hardware models.
  • Work closely with our research team and with customer workloads to find optimization opportunities.

Skills

Compiler infrastructure
GPU architecture
GPU ISA knowledge
ML compiler stacks
C++ / Rust
Production-grade compiler infra

Tools

LLVM
MLIR
XLA
Triton
torch.compiler

Job description

San Francisco Tensor Company is seeking a Member of Technical Staff for GPU Compiler Engineering to build the machine that searches and to optimize the entire pipeline from StableHLO ingestion to backend code generation. You will work on MLIR dialects, LLVM backend, and cross-architecture targets to push high-throughput AI workloads.

Join a small, hands-on team in San Francisco focused on research-driven compiler innovation with direct impact on large-scale compute, including mobility of

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