Senior GFX/Display IP Digital Design Engineer

Meta; Sunnyvale (CA); Hybrid; USD 180,000 - 240,000; Full time

Job summary

Meta is seeking a GFX/Display IP Digital Design Engineer in Sunnyvale, CA to contribute to ASIC digital μArchitecture and design. You will work with researchers and engineers to optimize low-power accelerators and custom silicon solutions for next-gen devices.

The role involves micro-architecture development, RTL coding, and collaboration with DV/PD teams to ensure IP/sub-system integration and performance targets are met.

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
• 6+ years of experience as a Hardware Design Engineer for production silicon shipped in volume.
• Experience in digital design μArchitecture, RTL coding, and micro-architecture development.
• Experience communicating technical design decisions and trade-offs to cross-functional partners.

Responsibilities

• Contribute to ASIC digital μArchitecture and design.
• Assist performance/power analysis of the design and help meet power and performance targets.
• Work with architects to map algorithms onto the hardware and specify requirements for IP and subsystems integration.
• Collaborate with adjacent teams such as Verification, Physical Design, and Design-for-Test.
• Develop micro-architecture, RTL coding, and design verification for complex IPs.
• Drive IP/sub-system micro-architecture and RTL design in collaboration with DV and PD leads.

Education

Bachelor's degree

6+ years experience

Job description

Meta is seeking a GFX/Display IP Digital Design Engineer in Sunnyvale, CA to contribute to ASIC digital μArchitecture and design. You will work with researchers and engineers to optimize low-power accelerators and custom silicon solutions for next-gen devices.

The role involves micro-architecture development, RTL coding, and collaboration with DV/PD teams to ensure IP/sub-system integration and performance targets are met.