Senior FPGA Verification Engineer – DoD Clearance

Prattwhitney; Sudbury (MA); On-site; USD 86,800 - 165,200; Full time

Benefits offered by this job

Medical insurance

Dental insurance

Vision insurance

401(k) match

Flexible work schedules

Parental leave

Paid time off

Holidays

Job summary

Prattwhitney is looking for a Senior Electrical Engineer to verify FPGA-based designs for radar applications. The position is based in Sudbury, MA, and requires U.S. citizenship along with an active DoD Secret clearance. The ideal candidate will have a minimum of 5 years of experience in digital design verification, proficient in SystemVerilog, and hands-on skill with UVM-based testing.

The salary range for this position is between $86,800 and $165,200 USD, and offers various benefits including medical, dental, vision coverage, and a 401(k) plan.

Qualifications

• Minimum 5 years of relevant experience in digital design verification.
• Proficient in SystemVerilog for verification.
• Strong understanding of constrained-random verification and functional coverage methodology.
• Experience with regression management and debugging of complex intermittent failures.
• Hands-on experience verifying designs using UVM-based testbenches.

Responsibilities

• Own or contribute to the successful completion of FPGA-based designs on time and on budget.
• Verify designs utilizing self-checking techniques with directed and constrained random tests.
• Track functional and code coverage using UVM.
• Create complete documentation including verification plan and reports.
• Work cooperatively with systems, hardware, and software engineers.

Skills

Digital design verification

SystemVerilog

UVM-based testbenches

Industry-standard simulators

Version control systems (Git, ClearCase, SVN)

Constrained-random verification

Debugging complex failures

AXI, PCIe, Ethernet, DDR protocols

Tools

FPGA tools (Vivado, Quartus)

Scripting languages (Python, Tcl, Perl)

SLURM workload manager

Job description

Prattwhitney is looking for a Senior Electrical Engineer to verify FPGA-based designs for radar applications. The position is based in Sudbury, MA, and requires U.S. citizenship along with an active DoD Secret clearance. The ideal candidate will have a minimum of 5 years of experience in digital design verification, proficient in SystemVerilog, and hands-on skill with UVM-based testing.

The salary range for this position is between $86,800 and $165,200 USD, and offers various benefits including medical, dental, vision coverage, and a 401(k) plan.