Senior FPGA Engineer II – Network Protocols

Cesiumastro; Westminster (CO); On-site; USD 126,000 - 168,500; Full time

Benefits offered by this job

Company stock options

Health, dental, and vision benefits

Life and disability insurance

Retirement plans

Job summary

CesiumAstro is seeking a Senior FPGA Engineer II to develop leading-edge hardware for aerospace systems. This role involves FPGA design through all development phases, emphasizing high-speed interfaces and digital processing. You will present design reviews and contribute to proposals. Requires a BS/MS in Electrical/Computer Engineering and 6 years of FPGA systems experience. The position compensates between $126,000 - $168,500, including stock options and a robust benefits package.

Qualifications

• Minimum 6 years of industry or university experience in FPGA systems.
• Production experience in OSI Layers 2 and 3 networking systems.
• Expertise in writing and reviewing VHDL and SystemVerilog.

Responsibilities

• Responsible for FPGA designs and systems through all phases.
• Present engineering design review materials to customers and team.
• Participate in proposal-writing efforts.

Skills

FPGA design

VHDL

SystemVerilog

Network design

Communication skills

Education

Bachelor of Science or Master of Science in Electrical Engineering or Computer Engineering

Tools

Xilinx Vivado

Siemens Questa

Job description

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State.

At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands‑on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward‑thinking individuals to join our team.

We are looking to add a Senior FPGA Engineer II - Network to our team. If you enjoy working in a startup environment and are passionate about developing leading‑edge hardware for satellites, spacecraft, and aerospace systems, we would like to hear from you.

In this position, you will be responsible for FPGA designs and systems through all phases of the development process. The ideal candidate will have experience in FPGA design, verification, test, and deployment at the HDL level. FPGA HDL designs will include high‑speed serial interfaces and data streams, digital processing cores, multiple clocks and clock domains, and management interfaces. Testing, validation, and verification will also be central tasks for any FPGA design. Experience in board‑level hardware design is also desirable.

The successful candidate will present engineering design review materials to our customers and executive team, as well as participate in proposal‑writing efforts. As such, excellent written and verbal communication skills are required.

JOB REQUIREMENTS AND MINIMUM QUALIFICATIONS

• Bachelor of Science (BS) or Master of Science (MS) degree in Electrical Engineering or Computer Engineering from an accredited university or institution.
• Minimum of 6 years of industry or university research experience in the design, analysis, and implementation of FPGA systems.
• Production experience in design, implementation, and integration of OSI Layers 2 and 3 networking systems, including protocols such as Ethernet, IP, and MPLS.
• Experience in networking system design, especially in determining throughput and memory requirements.
• Expertise in writing and reviewing VHDL.
• Proficiency in writing and reviewing SystemVerilog for block and system verification.
• Expertise in FPGA design and verification tools for modern complex FPGA and SoC platforms such as Xilinx Vivado and Siemens Questa.
• Excellent written and verbal communication skills.

PREFERRED EXPERIENCE

• Deep understanding of network design and an ability to derive requirements based on high‑level objectives.
• Familiarity with non‑FPGA networking platforms including ASICs and general‑purpose processors.
• Aerospace design and qualification.
• Worst‑case analysis, failure method and criticality analyses, and reliability analysis.
• Experience with board‑level hardware design.
• Familiarity with communications systems, such as digital signal processing.
• Experience writing low‑level software for interfacing to FPGA IP.

$126,000 - $168,500 a year

CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate’s work experience, education/training, and key skills. Full‑time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans.

CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard torace, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.

Please note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees.