Senior FPGA Engineer Allen, TX Radar Engineering

Castelion Corporation; Allen (TX); Hybrid; USD 130,000 - 190,000; Full time

Job summary

Castelion is seeking a Senior FPGA Engineer with Vitis HLS expertise to drive high-performance hardware for mission-critical systems. You will translate algorithms into efficient FPGA implementations and collaborate across hardware, software, and systems teams.

The role is full-time in Texas, with rapid development cycles, ownership, and measurable impact. You will work on HLS pipelines, timing closure, and verification to deliver deterministic, high-throughput solutions.

Qualifications

• Bachelor's degree in Electrical or Computer Engineering or related field.
• Experience with Vitis HLS or similar High-Level Synthesis tools.
• Strong C/C++ programming for hardware-oriented development.
• Experience generating VHDL/Verilog from HLS workflows.
• Familiarity with FPGA development flows including simulation, synthesis, and timing.
• Experience with Xilinx/AMD FPGA platforms and toolchains.

Responsibilities

• Develop FPGA-based implementations using Vitis HLS to generate VHDL/Verilog from C/C++ code.
• Translate algorithms and system requirements into efficient hardware architectures.
• Develop and optimize high-level synthesis pipelines and dataflow architectures.
• Collaborate with software, avionics, and systems engineers to integrate FPGA functionality into embedded platforms.
• Perform FPGA simulation, synthesis, timing analysis, and hardware validation.
• Optimize designs for throughput, determinism, and resource utilization.
• Support hardware integration, board bring-up, and debugging as needed.
• Contribute to verification and testing of FPGA functionality.

Skills

C/C++ programming

High-Level Synthesis

Vitis HLS

Xilinx/AMD FPGA toolchains

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Tools

Vitis HLS

Vivado

AXI interfaces

DMA

Job description

Castelion is moving incredibly fast to develop and deliver advanced defense systems at a time when execution matters more than ever. We believe focus, ownership, and excellence are decisive advantages - and we're building a world-class team to turn bold ideas into real capability.

This is a rare opportunity to join at an early stage, where you'll have significant ownership, collaborate with exceptional teammates, and make a direct, measurable impact on our mission and the future of the company - regardless of your function.

Castelion is seeking a Senior FPGA Engineer with strong experience in Vitis HLS and High-Level Synthesis workflows to support the development of high-performance digital systems for mission-critical hardware. This is a high-impact, full-time role focused on accelerating FPGA development by translating algorithmic and system-level requirements into efficient FPGA implementations using C/C++-based design flows.

You will work closely with our hardware, software, and systems engineering teams to implement and optimize FPGA-based processing capabilities. This role is ideal for an engineer who can ramp quickly, contribute immediately, and deliver optimized hardware implementations in a fast-moving development environment.

Responsibilities

• Develop FPGA-based implementations using Vitis HLS to generate VHDL/Verilog from C/C++ code
• Translate algorithms and system requirements into efficient hardware architectures optimized for performance and latency
• Develop and optimize high-level synthesis pipelines and dataflow architectures
• Collaborate with software, avionics, and systems engineers to integrate FPGA functionality into embedded platforms
• Perform FPGA simulation, synthesis, timing analysis, and hardware validation
• Optimize designs for throughput, determinism, and resource utilization
• Support hardware integration, board bring-up, and debugging as needed
• Contribute to verification and testing of FPGA functionality

Basic Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field
• Demonstrated experience using Vitis HLS or similar High-Level Synthesis tools
• Strong C/C++ programming experience for hardware-oriented development
• Experience generating VHDL or Verilog from HLS workflows
• Familiarity with FPGA development flows including simulation, synthesis, and timing closure
• Experience with Xilinx/AMD FPGA platforms and toolchains

Preferred Skills and Experience

• Experience with high-throughput signal processing, sensor processing, or real-time embedded systems
• Experience optimizing HLS pipelines for latency, parallelism, and memory bandwidth
• Familiarity with AXI interfaces, DMA, and FPGA-based accelerators
• Experience with Vivado and Vitis development environments
• Background in aerospace, defense, robotics, or other high-performance embedded systems

Castelion offers a generous benefits package. Please refer to the bottom of our Careers page for more details.

Other Duties

Please note this job description is not designed to cover or contain a comprehensive listing of activities, duties or responsibilities that are required of the employee for this job. Duties, responsibilities and activities may change at any time with or without notice.

Additional Eligibility Requirements

This position may require access to classified information or restricted U.S. Government sites, systems, or information, as determined by the Company and/or applicable U.S. Government requirements. If the position is so designated, your employment in the role may be contingent upon your ability to obtain and maintain the required U.S. Government security clearance or other government authorization, and to satisfy any citizenship or other eligibility requirements imposed by applicable law, regulation, executive order, or government contract requirements. You will be notified if and when such requirements apply.

Affirmative Action/EEO Statement

Castelion is an Equal Opportunity Employer. We are committed to providing equal employment opportunities to all applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, genetic information, protected veteran status, or any other characteristic protected by applicable federal, state, or local law.

Castelion is committed to providing reasonable accommodations to qualified individuals with disabilities throughout the application and hiring process. If you require a reasonable accommodation to complete an application, participate in the interview process, or otherwise participate in the hiring process, please contact [e-mail]. Requests for accommodation will be considered on an individual basis and handled in accordance with applicable law.

Castelion is committed to fostering a workplace where employment decisions are based on qualifications, business needs, and the ability to perform the essential functions of the role, with or without reasonable accommodation.

This position requires access to export-controlled information, and as such, employment (or hiring of a contractor) is contingent upon the candidate’s ability to access all applicable export-controlled information without additional export licensing being required by the Bureau of Industry and Security and/or the Directorate of Defense Trade Controls.