Senior FPGA Engineer (Algo)

DRW; Chicago (IL); On-site; USD 150,000 - 250,000; Full time

Benefits offered by this job

Comprehensive health insurance

401k with employer match

Flexible spending accounts

Job summary

A diversified trading firm in Chicago is seeking an FPGA Engineer to design and implement low latency FPGA applications. The ideal candidate will have a Bachelor's degree in Computer or Electrical Engineering, with strong experience in Verilog and FPGA design flow. This role involves full lifecycle development and collaboration with cross-functional teams. A competitive salary and comprehensive benefits package are offered.

Qualifications

• 3+ years of experience in FPGA and hardware engineering.
• Strong skills in writing Verilog, 2+ years required.
• Experience with static timing analysis and lab debugging.

Responsibilities

• Architect and implement new FPGA applications from scratch.
• Research cutting-edge FPGA hardware and technologies.
• Conduct lab debugging and characterization of new hardware.

Skills

FPGA design flow experience

RTL logic design (Verilog)

Strong hardware engineering

System-on-chip architecture

Data gathering skills

Education

Bachelor’s degree in Computer/Electrical Engineering

Tools

XILINX FPGA design flow

ALTERA FPGA design flow

Job description

DRW is a diversified trading firm with over 3 decades of experience bringing sophisticated technology and exceptional people together to operate in markets around the world. We value autonomy and the ability to quickly pivot to capture opportunities, so we operate using our own capital and trading at our own risk.

Headquartered in Chicago with offices throughout the U.S., Canada, Europe, and Asia, we trade a variety of asset classes including Fixed Income, ETFs, Equities, FX, Commodities and Energy across all major global markets. We have also leveraged our expertise and technology to expand into three non-traditional strategies: real estate, venture capital and cryptoassets.

We operate with respect, curiosity and open minds. The people who thrive here share our belief that it’s not just what we do that matters–it's how we do it. DRW is a place of high expectations, integrity, innovation and a willingness to challenge consensus.

We are currently seeking aFPGA Engineerto join one of our trading teams. While DRW has been leveraging FPGA technologyfor a number of years, you will have the opportunity to build an FPGA application from scratch for an existing team. We’re seeking a candidate that has a strong understanding of software and hardware interaction. This person will participate in the full development lifecycle, including system and block level testing, of low latency high throughput FPGA design.

This role is for the Chicago office only.

Responsibilities

• Architect and implement new FPGA applications (synthesis, place & route, static timing analysis, documentation) from the ground up
• Research and evaluate a variety of cutting-edge FPGA hardware and technologies
• Propose creative solutions to overcome FPGA/hardware limitations
• Liaise directly with software and other design teams
• Conduct lab debugging and characterization of new hardware

Candidate Requirements

• Bachelor’s degree or higher, Computer/Electrical Engineering with 3+ years of experience within the field; (Master’s degree or higher also counts for experience)
• Solid Hardware Engineering experience, especially with FPGA
• Highly autonomous with a can-do attitude able to lead an FPGA based project from system requirements to production
• Strong capacity to quickly evaluate FPGA based project feasibility based on hardware limitation
• Strong skills in RTL logic design (Verilog) and verification; 2+ years of experience writing Verilog
• Experience in FPGA design flow including synthesis, place & route , static timing analysis is required
• Experience with the design of system-on-chip (SOC) architectures, memory & processor subsystems, networking, and peripheral interconnect is required
• Knowledge of the TCP/IP stack
• Strong working knowledge of either XILINX or ALTERA FPGA design flow
• Experience with functional verification utilizing high-level methodologies (e.g. System Verilog) is a plus.
• Excellent research and data gathering skills

The annual base salary range for this position is $150,000 to $250,000 depending on the candidate’s experience, qualifications, and relevant skill set. The position is also eligible for an annual discretionary bonus. In addition, DRW offers a comprehensive suite of employee benefits including group medical, pharmacy, dental and vision insurance, 401k (with discretionary employer match), short and long-term disability, life and AD&D insurance, health savings accounts, and flexible spending accounts.

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As set forth in DRW’s Equal Employment Opportunity policy, we do not discriminate on the basis of any protected group status under any applicable law.