Senior FPGA Engineer

FieldLine Medical; Louisville (CO); On-site; USD 130,000 - 165,000; Full time

Benefits offered by this job

Medical, dental, and vision insurance

401(k) with company matching up to 6%

Paid Time Off, Paid Sick Leave, and #

Job summary

FieldLine Medical in Louisville, Colorado, is seeking a Senior FPGA Engineer to advance our HEDscan system. You will own FPGA subsystems end to end, from architecture through verification, working at the hardware/software boundary to keep the system fast, stable, and reliable.

You will design high‑speed SerDes links, DDR4 interfaces, and real‑time DSP paths, drive timing closures for Arria 10 devices, and collaborate with embedded software.

Qualifications

• B.S. in Electrical Engineering or closely related field; M.S. preferred.
• 7+ years of professional FPGA design experience owning a subsystem end to end.
• Experience with SystemVerilog.
• Hands-on experience with high-speed SerDes and DDR4 memory integration.

Responsibilities

• Architect, implement, and verify FPGA designs for HEDscan system.
• Design and implement high-speed serial transceiver links between HEDscan chassis.
• Design and incorporate DDR4 memory on the System on Module.
• Improve real-time control and DSP data paths for sensor stability.
• Drive timing closure, resource budgeting, and design-for-test for Arria 10 devices.
• Build simulation and verification environments.
• Collaborate with embedded software on hardware/software boundary, register maps, DMA, and SoC integration.
• Contribute to design documentation and ISO 13485 design control process.
• Participate in on-site testing and measurements using the HEDscan system.

Skills

SystemVerilog

SerDes design

DDR4 memory interfaces

FPGA debugging

Lab/workbench skills

Self-directed

Education

B.S. in Electrical Engineering

M.S. preferred

Tools

Arria 10 FPGA

Intel/Altera FPGA tools

Efinix Trion T20

Job description

FieldLine Medical is a Colorado-based medical device company pioneering optically pumped magnetometer (OPM) technology for functional brain imaging. Our HEDscan system is redefining magnetoencephalography (MEG), making whole-head brain measurement more accessible than ever. We are a small, fast-moving team of scientists, engineers, and technologists building devices with real clinical impact.

We are looking for a Senior FPGA Engineer to advance our existing FPGA architecture, help design the next-generation HEDscan system, design, verify, and implement new features for our platform. You will own FPGA subsystems end to end — from architecture through verification — working at the hardware/software boundary to keep our systems fast, stable, and reliable.

WHAT YOU’LL DO

• Architect, implement, and verify FPGA designs for our HEDscan system
• Design and implement high-speed serial transceiver links between HEDscan chassis
• Design and incorporate DDR4 memory on the System on Module
• Improve existing real-time control and DSP data paths (filtering, decimation, feedback loops) that keep the sensor array stable
• Drive timing closure, resource budgeting, and design-for-test across Arria 10 devices
• Build simulation and verification environments
• Partner with embedded software on the hardware/software boundary, register maps, DMA, and SoC integration
• Contribute to design documentation and verification evidence within our ISO 13485 design control process
• Participate in on-site testing and measurements using the HEDscan system

WHAT WE’RE LOOKING FOR

Required

• B.S. in Electrical Engineering, Computer Engineering, or a closely related field; M.S. preferred
• 7+ years of professional FPGA design experience, with a track record of owning a subsystem end to end
• Experience with SystemVerilog
• Hands-on experience designing and debugging high-speed serial transceivers (SerDes, multi-gigabit links, clock/data recovery, equalization, jitter and eye-diagram work)
• Practical DDR4 experience: controller integration, calibration, timing closure, and real-world throughput debugging
• Strong lab and debug skills
• Self-directed and independent with a willingness to learn on the go
• Ability to work on-site in Louisville, CO

Nice to Have

• Experience with Intel/Altera FPGAs, particularly Arria 10
• Experience with Efinix FPGAs (Trion T20)
• DSP and control-systems background — digital filters, feedback loops, closed-loop sensor control
• C++ and System-on-Chip development, including Arria 10 HPS or similar hard-processor integration
• Experience in a regulated medical device environment (ISO 13485, IEC 62304, design controls, V&V documentation)
• Familiarity with Git-based workflows

COMPENSATION & BENEFITS

Base salary range: $130,000 – $165,000 per year

The posted range reflects the salary FLM reasonably expects to pay for this position at the time of posting. Actual placement within the range depends on job-related experience, depth of relevant technical skill, education, and equity.

In addition to base salary, full-time employees are eligible for:

• Medical, dental, and vision insurance
• 401(k) with company matching up to 6%
• Paid Time Off, Paid Sick Leave, and Company Holidays

WORK LOCATION

This is a full-time, on-site position at our Louisville, Colorado facility. The work is tied to hardware and lab instrumentation, so this role is not eligible for remote or hybrid arrangements.

FieldLine Medical is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status, or any other characteristic protected by applicable law. FLM complies with the Colorado Equal Pay for Equal Work Act. We do not ask for age, date of birth, or dates of school attendance on the initial application.