Senior FPGA Engineer

Insight Global; Chandler (AZ); On-site; USD 108,000 - 132,000; Full time

Job summary

Insight Global in Chandler, AZ is seeking a Sr. FPGA Engineer to design and develop advanced FPGA/SoC systems for high performance communications products. The role covers architecture through implementation, simulation, and hardware testing on-site.

Responsibilities include IP integration, drivers in C++, embedded firmware, and collaboration across hardware, software, and systems teams to deliver high-throughput digital solutions. Strong communication with management is essential.

Qualifications

• Bachelor's in electrical or computer engineering (or related degree).
• 5+ years of FPGA/ASIC SoC design experience.

Responsibilities

• Design, develop, document, debug and test FPGA SoC systems; including IP integration into FPGA Projects (synthesis/implementation), High-Performance FPGA IP (VHDL/System Verilog).
• Userspace Drivers for FPGA IP (C++), Firmware for Embedded Microcontrollers.
• Create and implement complex IP using VHDL or System Verilog.
• Collaborating with hardware, software, and systems teams to build reliable, high throughput digital communication solutions.
• Utilize strong communication skills to effectively work and communicate with team members and engineering management.

Skills

FPGA/ASIC design

VHDL/SystemVerilog

Embedded Linux

C++

SoC design

IP integration

AMBA AXI/APB

Schematic capture

Education

Bachelor's degree in Electrical or Computer Engineering

Tools

Altera Quartus

Xilinx Vivado

Yocto/U-Boot/DeviceTree

Job description

A client in Chandler, AZ is looking to bring on a Sr. FPGA Engineer to join their team. This will be a full-time position, working Monday through Friday on-site. The pay starts at $120K+ based on experience. This individual will design and develop advanced FPGA and SoC systems used in high performance communications products, working through the full lifecycle from architecture to implementation, simulation, and hardware testing.

Responsibilities

• Design, develop, document, debug and test FPGA SoC systems; including IP Integration into FPGA Projects (synthesis/implementation), High-Performance FPGA IP (VHDL/System Verilog).
• Userspace Drivers for FPGA IP (C++), Firmware for Embedded Microcontrollers.
• Create and implement complex IP using VHDL or System Verilog.
• Collaborating with hardware, software, and systems teams to build reliable, high throughput digital communication solutions.
• Utilize strong communication skills to effectively work and communicate with team members and engineering management.

Qualifications

• Bachelor's in electrical or computer engineering (or related degree).
• 5+ years of experience in FPGA/ASIC SoC design.

Required Skills

• Working knowledge of digital IF streams such as VITA 49.2, DIFI and/or eCPRi (Highly Desired).
• Working knowledge of Embedded Linux: Kernel / Yocto / U-Boot / DeviceTree.
• Working knowledge with SATCOM waveforms like DVB-S2X and/or 5G NTN 3GPP Rel 17/18.
• Working knowledge of communication networks and security within a zero-trust environment.

Preferred Skills

• Strong FPGA Implementation with Altera Quartus or Xilinx Vivado.
• Experience designing/debugging SoC systems with AMBA-compliant AXI and APB interfaces.
• Experience designing fmax-optimized, high-throughput, pipelined AXI-Stream IPC.
• Capable of creating RTL simulations to identify and resolve most issues before hardware tests.
• Knowledgeable in Static Timing Analysis (STA) and Synopsis Design Constraints (SDC).
• Experience analyzing STA reports and post-synth netlist/placement to resolve failing paths.
• Experience contributing to schematic capture and layout for FPGA portions of PCB designs.

Pay range and compensation package

Pay starts at $120K+ based on experience.