Senior FPGA Engineer

KBR Careers; Beavercreek Township (OH); On-site; USD 160,000 - 210,000; Full time

Job summary

KBR Careers is looking for a Senior FPGA Engineer in Beavercreek, Ohio to enhance national security through advanced technology solutions. You will be tasked with designing and optimizing FPGA architectures critical for defense systems.

The ideal candidate should have extensive experience with FPGA and DSP systems, and a Bachelor's degree in Electrical Engineering. A competitive salary ranging from $160,000 to $210,000 is offered dependent on the applicant's skills and experience.

Qualifications

• 8+ years of relevant experience in FPGA, DSP, communications, or RF signal processing systems.
• Experience targeting FPGA devices from AMD and/or other major vendors.
• Strong understanding of DSP fundamentals, including sampling, filtering, and Fourier transforms.

Responsibilities

• Design, implement, and maintain FPGA‑based DSP architectures.
• Lead the development and integration of FPGA logic across multiple platforms.
• Implement, optimize, and debug real‑time DSP algorithms in hardware.

Skills

VHDL

Verilog

FPGA Development

DSP Fundamentals

Linux Development

Git

Education

Bachelor's degree in Electrical or Computer Engineering

Tools

Vivado

GNU Radio

MATLAB/Simulink

Job description

Title

Senior FPGA Engineer

Overview

KBR’s National Security Solutions team provides high‑end engineering and advanced technology solutions to customers in the intelligence and national security communities. This position has a profound impact on national security.

Why Join Us

• Innovative Projects: KBR’s work is at the forefront of engineering, logistics, operations, science, program management, mission IT and cybersecurity solutions.
• Collaborative Environment: Be part of a dynamic team that thrives on collaboration and innovation, fostering a supportive and intellectually stimulating workplace.
• Impactful Work: Your contributions will be pivotal in designing and optimizing defense systems that ensure national security and shape the future of space defense.

Key Responsibilities

• Design, implement, and maintain FPGA‑based DSP architectures for advanced communications and RF systems.
• Lead the development and integration of FPGA logic across multiple Software‑Defined Radio (SDR) platforms, ensuring reliable performance and interoperability.
• Implement, optimize, and debug real‑time DSP algorithms in hardware, including filtering, FFTs, modulation/demodulation, and synchronization functions.
• Integrate FPGA designs with embedded processors, external peripherals, and system interfaces using standard communication protocols such as AXI.
• Develop supporting software and firmware to command, control, and interface with FPGA‑based modules.
• Perform hardware bring‑up, test, and debugging in laboratory environments using standard RF and digital test equipment.
• Create and maintain simulation environments, testbenches, and verification workflows to validate functional and timing correctness of FPGA designs.
• Collaborate with RF, software, firmware, and systems engineers to support end‑to‑end system integration and troubleshooting.
• Analyze and optimize FPGA performance with respect to throughput, latency, resource utilization, and power constraints.
• Develop scripts and automation tools to support FPGA build, test, and deployment workflows.
• Support configuration management, documentation, and version control best practices throughout the FPGA development lifecycle.
• Lead or participate in technical design reviews, provide engineering estimates, and contribute to system architecture decisions.
• Mentor junior and mid‑level engineers and promote best practices in FPGA design, DSP implementation, and debugging techniques.

Minimum Qualifications

• Bachelor’s degree in Electrical or Computer Engineering
• 8+ years of relevant experience in FPGA, DSP, communications, or RF signal processing systems
• Proficiency in VHDL and/or Verilog
• Experience targeting FPGA devices from AMD and/or other major vendors
• Experience with FPGA development tools such as Vivado or similar toolchains
• Familiarity with AXI‑based communication architectures
• Strong understanding of DSP fundamentals, including sampling, filtering, and Fourier transforms
• Experience working in a Linux development environment
• Experience using Git or similar version control systems
• Ability to obtain and maintain a U.S. DoD security clearance

Preferred Qualifications

• Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field
• Experience implementing DSP algorithms in both HDL and C/C++
• Experience with SDR frameworks such as GNU Radio, RFNoC, RedHawk SDR, or OpenCPI
• Experience integrating FPGA logic with embedded processors (e.g., ARM, MicroBlaze)
• Familiarity with MATLAB/Simulink or similar modeling tools
• Experience with advanced verification, simulation, or debug tools
• Experience developing automation or prototyping tools using Python
• Experience with AMD Zynq‑7000 or Zynq UltraScale+ RFSoC platforms
• Experience with PetaLinux and/or Yocto build systems

Basic Compensation

$160,000 - $210,000 (For Beavercreek, OH Only). The offered rate will be based on candidate knowledge, skills, abilities and/or experience and in consideration of internal parity.

EEO Statement

KBR is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, disability, sex, sexual orientation, gender identity or expression, age, national origin, veteran status, genetic information, union status and/or beliefs, or any other characteristic protected by federal, state, or local law.