SENIOR FPGA DESIGN VERIFICATION ENGINEER – PERMANENT

Jigsaw Group; Massachusetts; On-site; USD 90,000 - 150,000; Full time

Job summary

Join a forward-thinking company as a Senior FPGA Design Verification Engineer, where you'll play a crucial role in the aerospace and defense sector. You'll be part of a dynamic team responsible for designing secure products, from system architecture to production. This role offers a unique opportunity to work with cutting-edge technologies and methodologies, ensuring the highest standards of verification for complex FPGA designs. Enjoy a flexible work schedule, competitive benefits, and a culture that values continuous learning and collaboration. If you're passionate about innovation and security, this is the perfect opportunity for you.

Benefits

401k matching

Flexible schedules

Paid parental leave

Healthcare benefits

Health & wellness programs

Employee resource and social groups

Qualifications

• 8+ years of experience in FPGA design verification or 6+ years with a Master's degree.
• Strong knowledge of verification methodologies and scripting languages.

Responsibilities

• Define verification methodology for complex FPGAs and create test plans.
• Build scalable simulation environments and analyze requirements.

Skills

OVM/UVM design verification methodology

bash/csh

Perl

TCL

Python

VHDL

SystemVerilog/UVM

FPGA/ASIC design

Education

Bachelor’s degree in Electrical or Computer Engineering

Master’s degree in related field

Tools

Xilinx FPGA

Questa Advanced Functional Verification tools

Job description

SENIOR FPGA DESIGN VERIFICATION ENGINEER – PERMANENT

DEDHAM, MA – USA

Working for a company that is the Trusted Disruptor for the global aerospace and defence industry.

Job Overview:

As a Senior Cyber FPGA Design Verification engineer, you’ll be a member of a cross functional team responsible for product design from system architecture & requirements allocation through product release and production of cost-sensitive secure products.

Preferred Skills and Experiences:

• Experience with OVM / UVM design verification methodology, bash/csh, Perl, TCL, Python or similar scripting languages; VHDL or similar hardware description languages.

COMPETENCIES

• Experience defining verification methodology for complex FPGAs.
• Ability to analyze requirements, create test plans, build and set up scalable simulation environments from the ground up using SystemVerilog/UVM.
• Familiarity with testing complex designs, code coverage, functional coverage, assertions.
• Ability to work in a dynamic environment that includes working with changing needs and requirements.
• FPGA/ASIC design experience is a plus.
• Familiarity with Xilinx FPGA & Questa Advanced Functional Verification tools is a plus.
• Team player who thrives in collaborative environments and revels in team success.

Education/Work Experience Requirements:

• Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field.
• A minimum of 8 years of relevant experience; or Master’s degree plus a minimum of 6 years of relevant experience.

Further Information:

An exciting career path with opportunities for continuous learning and development.

Research oriented work, alongside award winning teams developing practical solutions for our nation’s security.

Flexible schedules with every other Friday off work, if desired (9/80 schedule).

Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more.