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CU Boulder’s LASP is seeking an FPGA Design Engineer IV to lead flight digital logic across missions; a senior technical leader driving requirements, RTL, verification, and hardware bring-up. You will mentor engineers, define baselines, and coordinate with cross-disciplinary teams, delivering flight-ready FPGA solutions for DAPHNE, DUSTER, EMA and CubeSat programs.
Due to export-control requirements, only U.S.
CU Boulder’s LASP is seeking an FPGA Design Engineer IV to lead flight digital logic across missions; a senior technical leader driving requirements, RTL, verification, and hardware bring-up. You will mentor engineers, define baselines, and coordinate with cross-disciplinary teams, delivering flight-ready FPGA solutions for DAPHNE, DUSTER, EMA and CubeSat programs.
Due to export-control requirements, only U.S.