Senior Firmware Design Engineer

AheadComputing

Austin (TX)

On-site

USD 120,000 - 180,000

Full time

6 days ago
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Benefits offered by this job

Competitive salary
Growth opportunities
Startup environment
Collaboration with engineers

Job summary

AheadComputing, Inc. seeks a Senior Firmware Design Engineer to architect, develop, and maintain low-level firmware for RISC-V CPUs. You will define HALs, work on bootloaders, and collaborate with HW teams on CSRs and memory-mapped I/O.

You’ll validate firmware in pre-silicon and post-silicon contexts and implement security features like secure boot and root-of-trust. Responsibilities include DRAM training, platform bring-up, and working with OpenOCD/Lauterbach for debugging in a fast-moving

Qualifications

  • Bachelor's degree in Electrical/Computer Engineering or related field plus 3 years of post-baccalaureate experience.
  • Develop low-level device drivers and firmware for SoC/CPU/GPU emulation in C/C++ for pre-silicon environments.
  • Experience with RISC-based assembly and verification.
  • Experience with memory-mapped I/O peripheral configuration and DRAM initialization.
  • Knowledge of software build systems (Make, CMake) and code versioning (Git or Perforce).
  • Document infrastructure firmware decisions and collaborate with HW teams.

Responsibilities

  • Architect, develop, and maintain low-level firmware and drivers for RISC-V platforms.
  • Define HAL interfaces and initialization sequencing for novel CPU designs.
  • Write production firmware for CPU bring-up, power management, and diagnostics.
  • Collaborate with CPU architecture and RTL teams on CSRs and memory-mapped I/O.
  • Design bootloaders and platform bring-up, including DRAM training and UEFI/U-Boot where applicable.
  • Develop firmware for hardware verification, RTL simulation, and FPGA emulation.
  • Implement security features such as secure boot and hardware root-of-trust.

Skills

Firmware in C/C++
RISC-V
Bootloader
GDB/OpenOCD
Memory-mapped I/O
Version control (Git/Perforce)
Pre-silicon verification

Education

Bachelor's degree in EE/CE/CS

Tools

OpenOCD
Lauterbach
GDB
JTAG
U-Boot

Job description

The Senior Firmware Design Engineer will spend 100% of working time performing the following duties:

CPU Firmware Architecture and Development: Architect, develop, and maintain low-level firmware and device drivers in C/C++ and assembly language targeting bare-metal and pre-OS execution environments on RISC-V processor platforms. Define firmware module boundaries, hardware abstraction layer (HAL) interfaces, and initialization sequencing for novel proprietary CPU designs. Write production-quality firmware for CPU bring-up, power management, system initialization, diagnostics, and hardware debug.

Hardware-Software Interface Definition and RISC Architecture Support: Apply practical knowledge of RISC-based processor architectures, including assembly code understanding and execution flow, to define and implement firmware interfaces for custom CPU features. Collaborate directly with CPU architecture and RTL design teams on custom instruction set extensions, machine-mode control and status registers (CSRs), and memory-mapped I/O peripheral configuration. Translate hardware architectural specifications into firmware-level interface requirements and implementation plans.

Bootloader and Platform Bring-Up Development: Design, implement, and validate bootloaders, ROM initialization sequences, and full platform bring-up code. Implement firmware-controlled memory initialization routines including DRAM training and initialization procedures. Optimize system boot performance and firmware runtime behavior for latency, power efficiency, and reliability. Develop and maintain support for firmware standards including UEFI/ACPI and open-source bootloaders such as U-Boot where applicable.

Pre-Silicon and Post-Silicon Validation Support: Develop and deploy firmware for use in hardware verification, RTL simulation, and FPGA emulation environments to validate and stress CPU designs prior to physical silicon tape-out. Perform hardware model bring-up and debug activities using GDB-based debug mechanisms and associated tooling including JTAG debug infrastructure (e.g., OpenOCD, Lauterbach). Support post-silicon lab bring-up including board initialization, failure analysis, and root cause analysis on hardware‑firmware interaction failures.

Firmware Security Implementation (approx. 15%) Design and implement security-critical firmware features including secure boot, hardware root‑of‑trust, key provisioning, and trusted firmware components. Ensure firmware security architecture complies with industry best practices and relevant platform security standards. Collaborate with security-focused architecture teams to translate hardware security primitives into robust firmware-enforced security policies.

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field, plus three (3) years of post-baccalaureate professional experience to include:
  • Developing low-level device drivers and infrastructure firmware for SoC, CPU and/or GPU emulation platforms in C/C++ programming language, targeting pre-silicon execution environments.
  • Applying practical knowledge of RISC-based assembly code understanding and execution flow and verification purposes.
  • Performing hardware model bring-up and debug activities using GDB-based debug mechanisms and associated tooling.
  • Experience with memory-mapped I/O peripheral configuration and DRAM initialization procedures.
  • Experience with industry-standard software build systems (e.g. Make, CMake) and maintaining codebases using version control software (Git or Perforce).
  • Documenting infrastructure firmware design decisions and collaborating with hardware engineering and architecture teams to support software-hardware integration.

What We Offer

  • Competitive salary and benefits package.
  • Opportunities for professional growth in an innovative startup environment.
  • Collaboration with talented engineers passionate about cutting-edge CPU technologies.
  • Opportunity to disrupt the CPU ecosystem
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