Senior Engineer (7830)

Socket.dev; San Jose (CA); On-site; USD 156,000 - 167,000; Full time

Job summary

TSMC North America in San Jose seeks a Senior Engineer to lead Design Rule Check, Layout vs. Schematic checks and fix violations across PDV/EMIR/Noise/SigEM.

You may customize top clocks and implement timing ECOs on high-performance blocks, performing DRC/LVS/ANTENNA analyses and signoffs. Responsibilities include floorplan analysis, congestion solutions, power integrity, signal integrity, and clock-tree implementation, with potential floorplanning and place-and-route tasks.

Qualifications

• Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 1 year of related experience.
• Knowledge of VLSI design, digital ICs, logic design, design for testing, computer architecture, and DDA.
• Experience with physical implementation or design verification.
• Experience with Perl/TCL language programming.
• Experience with N16 and below technology, chip integration and low-power methods.
• Experience with Netlist-GDS P&R, signoff tasks.
• Experience with block-level implementation or chip integration and signoff.

Responsibilities

• Perform DRC/LVS/ERC/ANTENNA analysis and cleanup.
• Implement top clocks and timing ECOs on high-performance blocks.
• Customize clock tree structure.
• Floorplan analysis and congestion solutions.
• Power IR/EM analysis and fixes.
• Signal EM/Noise analysis and fixes.
• Physical verification sign-off.
• Implement ECOs for timing closure.
• May perform floorplanning, place and route.

Skills

DRC/LVS/ERC

Floorplanning

Timing closure

Clock tree customization

Signal/Power integrity

Education

Master’s degree in Electrical or Computer Engineering

Tools

Perl/TCL

Netlist-GDS P&R

Job description

Job Title: Senior Engineer

Job Descriptions: Responsible for the Design Rule Check, Layout vs. Schematic checking and fixing all PDV/EMIR/Noise/SigEM violations and errors. You may also do customization and implementation of top clocks and implement timing ECOs on high performance blocks. Specific job duties include: DRC/LVS/ERC/ANTENNA analysis and clean up, Floorplan analysis and congestion solution; Power IR/EM analysis and fix; Signal EM/Noise analysis and fix; Physical verification sign off; Implement ECOs for timing closure; Customized Clock tree structure; May also perform floorplan, place and route.

Requirements: Master’s degree or foreign equivalent in Electrical Engineering, Computer Engineering, or a related field of study, and one (1) year of experience in a related position.

Work experience or academic coursework must have included: Knowledge of hardware design courses including VLSI design, digital integrated circuits, logic design, design for testing, computer architecture, and digital design automation; Knowledge of major EDA tools/design flows; Experience with physical implementation or design verification; Experience in Perl/TCL language programming; Experience in N16 and below technology, Chip level integration, and wire editing, low-power implementation methodology; Experience with Netlist-GDS P&R, signoff task; and Experience in block level implementation or chip integration and signoff.

Work site: TSMC Technology Inc., 2851 Junction Ave., San Jose, CA 95134 and various unanticipated work locations

Salary Range: $155,896 to $167,000/year.

Company Description

As a trusted technology and capacity provider, TSMC is driven by the desire to be:

• The world’s leading dedicated semiconductor foundry
• The technology leader with a strong reputation for manufacturing excellence
• Advancing semiconductor manufacturing innovations to enable the future of technology

TSMC pioneered the pure-play foundry business model when it was founded in 1987 and has been the world’s leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry’s leading process technologies and a portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world.

In North America, TSMC has a strong sales and service organization that works with customers by helping them achieve silicon success with cutting-edge technologies and manufacturing excellence. The Company has continued to accelerate its R&D investment and staffing in recent years and is expanding its manufacturing footprint to support customer innovation with 3D IC technologies and optimal manufacturing capacity.

For positions requiring access to technical data subject to export control regulations, including Export Administration Regulations, TSMC North America may have to obtain export licensing approval from the U.S. Government for certain individuals. All employment is contingent upon TSMC North America obtaining any export license or other approval that may be required by the U.S. Government.

Diversity statement

TSMC North America is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law.

TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us at [e-mail]. TSMC confirms to all applicants its commitment to meet TSMC’s obligations under applicable employment law. Reasonable accommodations will be determined on a case-by-case basis.

Pay Transparency / Benefits statement

At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $155,896.00/year to $167,000.00/year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC’s total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.

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