Senior Emulation Performance Engineer (Pre-Silicon)

Qualcomm; Austin (TX); On-site; USD 122,000 - 183,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a Senior Emulation Performance Methodology & Debug Engineer for the Emulation Team within the Central SoC Digital Hardware Organization in Austin, TX.

The role focuses on pre-silicon platforms, FPGA prototyping (Veloce, Palladium), and SoC functionality testing across CPU/DSP cores, DDR, IO, and peripherals. You will collaborate with architects, designers, verification engineers, software engineers, and customers, implementing global emulation methodologies

Qualifications

• Minimum: 4+ years in ASIC design/verification/validation/integration or related work, or 3+ with Master’s, or 2+ with PhD.
• Preferred: 5+ years in emulation and silicon environments.
• Experience with emulation platforms and failure analysis in pre-silicon environments.

Responsibilities

• Develop and deploy uniform global methodologies for emulation build generation and debug across FPGA platforms.
• Collaborate cross-site with vendors and executives; support pre-silicon bring-up.
• Prototype pre-silicon SoC designs and bring-up new FPGA emulation hardware/software.
• Debug low-level software and hardware issues; use JTAG and kernel debuggers; ensure timing closure.

Skills

ASIC design

Verilog

SystemVerilog

C programming

Python

TCL

FPGA prototyping

Emulation platforms

Education

Bachelor's degree in Science/Engineering or related field

Master's degree in Science/Engineering or related field

PhD in Science/Engineering or related field

Tools

Xilinx FPGAs

Intel FPGAs

Veloce

Palladium

Synthesis

Place and Route

JTAG

Kernel debuggers

Job description

Qualcomm Technologies, Inc. is seeking a Senior Emulation Performance Methodology & Debug Engineer for the Emulation Team within the Central SoC Digital Hardware Organization in Austin, TX.

The role focuses on pre-silicon platforms, FPGA prototyping (Veloce, Palladium), and SoC functionality testing across CPU/DSP cores, DDR, IO, and peripherals. You will collaborate with architects, designers, verification engineers, software engineers, and customers, implementing global emulation methodologies