Senior Electrical Systems Architect: 224G/448G PAM4 SI/PI

QUALCOMM, Inc.; San Diego (CA); Hybrid; USD 257,000 - 385,000; Full time

Job summary

Qualcomm, Inc. seeks a Senior Leader, Electrical Systems Architect to define and productize next-generation high-speed interconnects for AI, hyperscale datacenter, networking, and HPC platforms.

The role demands leadership in 224G/448G PAM4 signaling, SI/PI, and cross-disciplinary architecture spanning silicon, package, PCB, and rack-scale connectivity. A PhD or MS with 8+ years of experience is preferred, with hands-on modeling and industry-standard tools.

Qualifications

• Typical requirement: advanced degree with 8+ years of relevant work experience.
• Demonstrated success productizing 112G or 224G PAM4 systems.
• Strong background in high-speed interconnects and channel analysis.
• Experience leading cross-functional architecture decisions.

Responsibilities

• Define end-to-end architectures for 224G/448G PAM4 interconnect systems across silicon, package, PCB, and connectors.
• Lead SI/PI strategy including channel budgeting, COM analysis, and silicon correlation.
• Drive models and optimization for PHY/SerDes, equalization, FEC, and system performance tradeoffs.
• Mentor senior engineers and collaborate with hardware teams across disciplines.

Skills

High-speed SerDes

PAM4 signaling

Signal Integrity

Power Integrity

Package/PCB/Connector design

Advanced packaging

Channel modeling

COM analysis

End-to-end electrical system design

System architecture

Education

MS/PhD in Electrical/Computer Engineering or Physics

Bachelor's degree in Engineering

Tools

ADS

HFSS

CST

HSPICE

MATLAB

Python

Cadence Sigrity

PowerSI

Clarity

SystemVerilog

Verilog-A

IBIS-AMI modeling

Job description

Qualcomm, Inc. seeks a Senior Leader, Electrical Systems Architect to define and productize next-generation high-speed interconnects for AI, hyperscale datacenter, networking, and HPC platforms.

The role demands leadership in 224G/448G PAM4 signaling, SI/PI, and cross-disciplinary architecture spanning silicon, package, PCB, and rack-scale connectivity. A PhD or MS with 8+ years of experience is preferred, with hands-on modeling and industry-standard tools.