Senior EDA/CAD Engineer — Emulation Tools & ASIC Design

QUALCOMM, Inc.; Folsom (CA); On-site; USD 146,000 - 218,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a Senior CAD Tools Engineer to develop emulation CAD tools and related infrastructure for SoC design.

You will work with industry-standard tools, implement synthesis, partitioning, place-and-route, and clock optimization techniques while driving compute and storage optimizations. The role requires 7+ years in ASIC/FPGA-related work, strong C++ and CAD tool experience, and hands-on Linux expertise, with opportunities to mentor teammates and contribute to

Qualifications

• Bachelor's degree in Science, Engineering, or related field with 7+ years of related work experience.
• Master's or PhD in Computer Science or Computer Engineering preferred.
• 2+ years ASIC design, FPGA design, verification, or related work experience.
• 2+ years C++ SW development, CAD tool development, or related work experience.
• 2+ years of hands-on experience with Linux.
• 2+ years of direct hands-on experience with CAD SW development, Proven ability of software design principles, practices, and patterns.
• Demonstrable knowledge of data structures, algorithms and design patterns.
• Experience in RTL Synthesis, Clock Tree Optimization, VLSI concepts, logic design.
• Excellent interpersonal and analytical skills; ability to work independently and create customer-facing applications.

Responsibilities

• Develop critical emulation CAD tools addressing Qualcomm SoC needs (synthesis, partitioning, place and route, clock optimization).
• Work with industry-standard tools to develop infrastructure solutions.
• Drive compute and storage optimization.
• Mentor and lead other team members.

Skills

C++ development

Linux experience

Data structures & algorithms

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Computer Science/Engineering

PhD in Science/Engineering

Tools

Git

LSF

JIRA

GCC

Job description

Qualcomm Technologies, Inc. is seeking a Senior CAD Tools Engineer to develop emulation CAD tools and related infrastructure for SoC design.

You will work with industry-standard tools, implement synthesis, partitioning, place-and-route, and clock optimization techniques while driving compute and storage optimizations. The role requires 7+ years in ASIC/FPGA-related work, strong C++ and CAD tool experience, and hands-on Linux expertise, with opportunities to mentor teammates and contribute to