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Job summary
A well-funded semiconductor startup located in Austin, Texas, is seeking a Mixed-Signal Verification Engineer with over 5 years of experience in behavioral modeling and mixed-signal verification. The role involves developing verification strategies and collaborating with engineering teams to validate advanced DSP solutions. Candidates should have strong Verilog/SystemVerilog skills and familiarity with Cadence Virtuoso. Competitive compensation and opportunities for growth within the AI-driven tech space are offered.
Qualifications
5+ years of mixed-signal verification experience.
Strong background in Behavioral Modeling for analog-to-digital verification.
Basic understanding of analog design fundamentals.
Responsibilities
Perform behavioral modeling of analog designs to enable digital verification.
Conduct mixed-signal dynamic verification using chip-level digital design tools.
Write, simulate, and debug Verilog/SystemVerilog code for verification.
Develop test plans and scalable testbench automation.
Collaborate with engineering teams to validate high-speed designs.
Skills
Behavioral Modeling
Mixed-Signal Verification
Verilog/SystemVerilog Coding
Collaboration with Engineering Teams
Tools
Cadence Virtuoso
Digital Design Tools
Job description
A well-funded semiconductor startup located in Austin, Texas, is seeking a Mixed-Signal Verification Engineer with over 5 years of experience in behavioral modeling and mixed-signal verification. The role involves developing verification strategies and collaborating with engineering teams to validate advanced DSP solutions. Candidates should have strong Verilog/SystemVerilog skills and familiarity with Cadence Virtuoso. Competitive compensation and opportunities for growth within the AI-driven tech space are offered.