Senior DSP FPGA Engineer

Donatech Corporation; Cedar Rapids (IA); On-site; USD 110,000 - 150,000; Full time

Job summary

Donatech Corporation seeks a skilled FPGA/ASIC engineer to design, model, simulate and implement signal processing solutions. You will work with cross-functional teams to integrate DSP systems into larger platforms and optimize FPGA implementations for power, performance, and size.

A Final Secret clearance and STEM degree are required, with 3–5+ years of relevant experience. Responsibilities include collaboration, requirements capture, system testing, peer reviews and Jira task management.

Qualifications

• Typically requires STEM degree with minimum 5 years of relevant experience or a related advanced degree with 3+ years of experience.
• Active U.S. government Final Secret Security Clearance is required.
• Minimum 3 years of professional FPGA/ASIC development experience.
• Experience in signal processing and FPGA/ASIC development.
• Proficiency in VHDL/Verilog for FPGA/ASIC design.
• Proficiency with Simulink and MATLAB for DSP modeling and simulation.
• Experience with FPGA platforms (AMD/Xilinx, Altera, Microchip) and toolchains (Vivado, Quartus, Libero).
• Strong debugging and troubleshooting skills for FPGA/ASIC systems.
• Experience with revision control (Git, Subversion).

Responsibilities

• Adhere to client engineering, development and quality processes.
• Participate in Agile team meetings and planning activities.
• Capture requirements and implement signal processing algorithms for FPGA/ASIC systems.
• Model and simulate DSP systems using Simulink.
• Collaborate with cross-functional teams to integrate signal processing solutions.
• Optimize FPGA implementations for performance, power and size constraints.
• Conduct system-level analysis and testing against project requirements.
• Support peer reviews and certification activities.
• Peer reviewing FPGA development artifacts.
• Manage change requests and tasks in Jira.

Skills

FPGA development

Verilog/VHDL

DSP algorithms

Modeling & simulation

Debugging skills

Cross-functional collaboration

Education

Bachelor's degree in STEM

Advanced degree in related field

Tools

Vivado

Quartus

Libero

Simulink

MATLAB

HDL Coder

SystemVerilog

Git

Subversion

Job description

Position would require the candidate to be a W2 employee of Donatech, US Citizenship Required. Active Secret Clearance Required.

Responsibilities

• -Adhere to all applicable client Engineering Development and Quality processes, procedures, instructions and guidelines.
• -Participate in Agile team meetings and planning activities, as required to support programs covered by this work plan.
• -Requirements capture, development, and implementation of signal processing algorithms for FPGA or ASIC based systems.
• -Utilize Simulink for modeling and simulation of signal processing systems and workflows.
• -Collaborate with cross-functional teams to integrate signal processing solutions into larger systems
• -Optimize FPGA implementations to meet performance, power, and size constraints.
• -Conduct system-level analysis and testing to ensure adherence to project requirements.
• -Supporting peer reviews and certification analysis activities
• -Peer reviewing FPGA development artifacts
• -Management of change request and task assignments through Jira

Qualifications You Must Have

• -Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience.
• -An active U.S. government issued Final Secret Security Clearance is required
• -A minimum of 3 years professional experience in FPGA development, ASIC front end, or related areas
• -Professional experience in signal processing, FPGA/ASIC development, or related areas
• -Demonstrated experience developing signal processing solutions using VHDL and/or Verilog in a professional FPGA or ASIC development environment.
• -Expertise in Simulink and/or MATLAB for modeling and simulation of DSP systems
• -Proficient in VHDL/Verilog for FPGA/ASIC design and implementation
• -Demonstrated experience with algorithm development for signal processing applications such as filtering, modulation, demodulation, and spectral analysis
• -Proficient in VHDL/Verilog for FPGA/ASIC design and implementation.
• -Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure
• -Familiarity with FPGA platforms such as AMD/Xilinx, Altera, Microchip, or others, and associated toolchains (e.g., Vivado, Quartus, Libero).
• -Strong debugging and troubleshooting skills for FPGA/ASIC systems.
• -Proficiency with revision control concepts and tools (e.g., Git, Subversion)

Qualifications We Prefer

• -Excellent communication and teamwork skills with the ability to work in a collaborative environment.
• -Experience with high-speed digital interfaces and protocols (e.g., DDR, PCIe, Ethernet)
• -Familiarity with HDL Coder and generation of HDL from model-based designs
• -Familiarity with best-practice chip-level verification techniques and languages (e.g., constrained random, functional coverage, System Verilog)
• -Experience in Simulink and/or MATLAB for modeling and simulation of DSP systems
• -Experience with algorithm development/implementation for signal processing applications such as filtering, modulation, demodulation, and spectral analysis
• -Experience in ASIC / FPGA lab validation using advanced laboratory equipment
• -Experience with Unix, scripting, C/C++, and/or Perl