Senior Director of Hardware Engineering

MemryX Inc.; Ann Arbor (MI); On-site; USD 240,000 - 320,000; Full time

Benefits offered by this job

Competitive salary

Equity grants

Comprehensive health benefits

401(k) matching

Unlimited PTO

Parental leave

Job summary

MemryX Inc. in Ann Arbor, MI, seeks a Senior Director of Hardware Engineering to lead architecture, RTL design, verification, and production of the next‑generation AI accelerator chip.

You will guide a multi‑discipline team and collaborate with foundries, IP vendors, and software groups to deliver high‑performance, low‑power edge AI hardware. The role demands 15+ years in ASIC/SoC programs, strong leadership, and deep digital design expertise.

Qualifications

• Master’s degree or higher in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 15+ years of experience in complex ASIC/SoC development and leadership roles.
• Proven track record with multiple ASIC tapeouts and cross-functional teams.

Responsibilities

• Lead hardware engineering teams from architecture to tapeout and production.
• Drive next‑gen AI accelerator chip development with cross‑functional partners.
• Define SoC architecture, memory hierarchy, interfaces, and performance targets.
• Manage risks, schedules, and tradeoffs for production silicon.
• Mentor engineers and coordinate with foundries, OSATs, and IP vendors.

Skills

Technical leadership

ASIC/SoC development

Chip architecture

Team building

System integration

Education

Master’s degree in Electrical Engineering

Tools

EDA tools

RTL-to-GDS

IP/vendor coordination

Job description

MemryX Inc. is a semiconductor company focused on delivering high-performance, low-power AI accelerators for edge computing. Founded in 2019 and headquartered in Ann Arbor, Michigan, the company also operates existing engineering branches in Taipei and Hsinchu Taiwan, and Riyadh, Saudi Arabia.

Our unique compute-near-memory architecture minimizes data movement and enables massively parallel, scalable on-chip AI inference. We’ve co-designed a full hardware-software stack (compiler, runtime, and APIs) to make AI development both easy and high-performance. Powered by MemryX Compute Engines, our decentralized many-core dataflow design delivers industry-leading throughput and efficiency, ideal for smart edge devices.

We are currently in production with our MX3 AI accelerator and actively developing next-generation MX4, backed by top-tier VCs. At MemryX, you’ll join a collaborative, innovation-driven team that empowers you to shape the future of edge AI.

Who You Are

• Communicative & Collaborative: You’re open, honest, and thrive on feedback.
• Curious & Innovative: You love brainstorming new ideas and turning them into reality.
• Tech-Driven: Passionate about advancing AI and edge computing.
• Adaptable: Energized by the fast pace and ambiguity of a startup environment.

Why You’ll Love Working Here:

• Hands-On Learning: Structured rotations across hardware and software domains.
• Innovative Culture: Rapid prototyping, continuous learning, and a true startup mindset.
• Career Path: Clear progression from junior engineer to specialist and beyond.
• Great Perks: Competitive salary, equity grants, comprehensive health benefits, and more.

About The Role

MemryX is looking for a Senior Director of Hardware Engineering to lead the development of our next-generation AI accelerator chip. This is a highly technical leadership role responsible for guiding the chip design team from architecture and specification through implementation, tapeout, bring-up, and production. You will work closely with architecture, software, systems, product, and business teams to define the next generation of MemryX products, while leading internal engineering teams and coordinating with external partners including foundries, OSATs, IP vendors, and semiconductor design service providers.

What You'll Do:

• Lead and grow the hardware engineering team responsible for the design and implementation of MemryX AI accelerator chips.
• Drive chip development from product requirements and architecture through RTL design, verification, physical implementation, tapeout, silicon bring-up, and production.
• Work closely with cross-functional teams to define next-generation AI accelerator architecture, SoC architecture, memory hierarchy, interfaces, performance targets, and product requirements.
• Translate system- and product-level requirements into clear hardware architecture and implementation specifications.
• Lead technical tradeoff analyses across performance, power, area, cost, schedule, and implementation risk.
• Provide hands-on technical leadership and design reviews across key areas of the chip, including compute architecture, memory subsystem, SoC integration, interconnect, and external interfaces.
• Establish development plans, milestones, ownership, and execution processes for complex ASIC programs.
• Identify technical and schedule risks early and drive engineering teams toward practical solutions.
• Coordinate closely with software, compiler, firmware, systems, and application teams to ensure hardware/software co-design and successful product deployment.
• Manage relationships and technical execution with external semiconductor partners, including foundries, OSATs, IP vendors, EDA vendors, and ASIC/design service providers.
• Lead technical discussions involving process technology, IP selection, packaging, manufacturing, test, yield, cost, and supply-chain considerations.
• Support silicon bring-up, characterization, debug, qualification, and transition into volume production.
• Communicate architecture decisions, technical status, risks, schedules, and recommendations clearly to engineering leadership and company executives.
• Mentor engineers and technical leads and help build a strong, pragmatic, and execution-focused hardware engineering organization.

What We Expect to See:

• Master’s degree or higher in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 15+ years of experience developing complex ASICs, SoCs, processors, accelerators, or related semiconductor products.
• Technical leadership experience, including leading ASIC/SoC engineering teams and complex chip development programs.
• Multiple successful ASIC/SoC tapeouts with direct involvement across major stages of the chip development lifecycle.
• Deep understanding of digital IC design, including architecture, microarchitecture, RTL design, verification, synthesis, timing, physical design, DFT, and silicon bring-up.
• Strong understanding of SoC architecture, memory systems, high-speed interfaces, clock/reset architecture, power management, and chip-level integration.
• Experience making performance, power, area, cost, and schedule tradeoffs for production silicon.
• Ability to review technical designs in depth and work directly with engineers to resolve difficult architecture and implementation problems.
• Experience working with IP vendors and external design service companies.
• Experience planning and executing ASIC programs across internal teams and external partners.
• Strong technical communication skills and the ability to work effectively with architecture, software, product, operations, and executive teams.
• Demonstrated ability to lead in a fast-moving environment where requirements evolve and engineers must balance technical ambition with execution risk.

What We Would Be Happy to See:

• Experience developing AI/ML accelerators, GPUs, NPUs, CPUs, DSPs, or other high-performance compute architectures.
• Strong knowledge of neural-network workloads and the architectural considerations involved in accelerating modern AI models.
• Experience with hardware/software co-design, including interaction with compilers, runtimes, firmware, and performance modeling.
• Experience designing advanced memory hierarchies and working with SRAM, LPDDR, HBM, or other high-bandwidth memory technologies.
• Experience with advanced semiconductor process nodes and familiarity with the technical and economic tradeoffs of process-node selection.
• Experience with advanced packaging, chiplets, 2.5D/3D integration, or die-stacking technologies.
• Familiarity with PCIe, CXL, LPDDR, HBM, or other high-speed chip interfaces.
• Experience selecting and integrating third-party semiconductor IP.
• Experience managing outsourced RTL-to-GDS or turnkey ASIC development programs.
• Experience working directly with foundries and major OSATs.
• Understanding of semiconductor manufacturing, packaging, test, yield, reliability, and production cost.
• Experience taking a semiconductor product from early architecture through production and volume shipment.
• Previous experience building or leading hardware teams in a startup or other fast-paced engineering environment.

Reports to : CEO

Work Schedule : Full-time

Why Join MemryX?

We offer more than just a job - we offer a career with purpose! Our benefits package includes:

• Comprehensive medical, dental, and vision coverage. MemryX covers 100% of the employee premium!
• Matching 401(k).
• Equity incentive packages.
• Company-paid life insurance coverage for all employees .
• Unlimited paid time off.
• Generous paid parental leave.
• Growth and learning opportunities, including tuition reimbursement and professional development support.
• Potential for advancement in a growing organization.

Employment Opportunity and Benefits of Employment:

We are committed to creating and fostering a diverse and inclusive workplace environment for all of our employees. We are an equal opportunity employer.