Senior CPU Performance Architect - Power & Silicon + Equity

Google LLC; Mountain View (CA); On-site; USD 163,000 - 236,000; Full time

Benefits offered by this job

Equity

Bonus potential

Benefits

Job summary

Google LLC is seeking a senior silicon/architecture-focused engineer in Mountain View, CA to perform deep-dive microarchitectural analyses, design power and performance experiments on real silicon, and build early power/performance models. You will partner with CPU architects and cross-functional teams to set realistic power/performance goals for future Google silicon.

You will leverage C/C++ for modeling and Python for data analysis, with 8+ years in performance analysis and workload

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 8 years of experience with performance analysis, microarchitectural bottleneck isolation, and workload characterization.
• Experience with C/C++ for architectural modeling and Python for data analysis and automation.

Responsibilities

• Lead deep-dive microarchitectural analysis on silicon to isolate pipeline stalls and bottlenecks.
• Design and run advanced power and performance experiments on physical silicon with compute workloads.
• Develop early-stage power/performance models for 'what-if' scenarios.
• Collaborate with CPU architects and cross-functional teams on power/performace goals.

Skills

Performance analysis

Microarchitectural bottleneck analysis

Workload characterization

C/C++ for architectural modeling

Python scripting

Education

Bachelor's degree in Electrical/Computer Engineering or Computer Science

Master's or PhD in EE/CS with emphasis on computer architecture

Tools

ARM ISA ecosystem

Linux kernel knowledge

Job description

Google LLC is seeking a senior silicon/architecture-focused engineer in Mountain View, CA to perform deep-dive microarchitectural analyses, design power and performance experiments on real silicon, and build early power/performance models. You will partner with CPU architects and cross-functional teams to set realistic power/performance goals for future Google silicon.

You will leverage C/C++ for modeling and Python for data analysis, with 8+ years in performance analysis and workload