Senior Circuit Design Engineer - Mixed-Signal & Timing Lead

NVIDIA; Santa Clara (CA); On-site; USD 168,000 - 265,000; Full time

Job summary

NVIDIA is seeking a Senior Circuit Design Engineer in Santa Clara to advance digital and mixed-signal IPs, improving timing and noise margins across next‑gen products.

You will design digital and mixed-signal circuits, drive physical implementation, and mentor junior engineers while collaborating with global teams on silicon-quality initiatives. A strong background in deep submicron processes and SPICE is essential.

Qualifications

• BSEE (or equivalent) with 8+ years of circuit design experience.
• Strong knowledge of deep submicron processes and digital circuit techniques.
• Experience with analogue/mixed-signal block design (op-amps, ADCs) and SPICE simulations.

Responsibilities

• Participate in cutting edge Processor design in deep submicron technologies.
• Design digital, mixed-signal circuits for silicon correlation and noise mitigation.
• Collaborate with cross-functional teams to improve performance and reliability of NVIDIA’s products.
• Drive design and physical implementation of digital and/or mixed-signal IPs for voltage and noise sensing.
• Mentor/technical lead for junior team members.

Skills

Digital circuit design

Mixed-signal design

Spice simulations

Mentorship/leadership

Hardware verification

Education

BSEE or equivalent

MS in Electrical/Computer Engineering preferred

Tools

RTL

Place and Route

Logic synthesis & verification

DFT

Perl/Tcl/Make scripting

Job description

NVIDIA is seeking a Senior Circuit Design Engineer in Santa Clara to advance digital and mixed-signal IPs, improving timing and noise margins across next‑gen products.

You will design digital and mixed-signal circuits, drive physical implementation, and mentor junior engineers while collaborating with global teams on silicon-quality initiatives. A strong background in deep submicron processes and SPICE is essential.