Senior CAD Engineer – Power Integrity & ERC Automation

Apple, Inc.; Sunnyvale (CA); On-site; USD 150,000 - 210,000; Full time

Job summary

Apple, Inc. seeks an engineer to design and validate custom circuit ERC and power‑intent flows for transistor‑level analog, RF and mixed‑signal designs.

You will develop CAD methodologies, implement circuit recognition, netlist tracing, and power domain interactions, partnering with CAD, layout, and technology teams. The role emphasizes hands‑on development, mentoring, and delivering robust verification tools across multiple technology nodes, with opportunities to influence hardware design used

Qualifications

• Experience in Electric Rules Checks (ERC) and circuit tracing.
• Experience with custom power‑intent tools and flows.
• Industry internship, research position, or equivalent experience.
• Led a software development project in electrical engineering.
• Strong programming/scripting skills: Perl, Python, TCL, SKILL, C++ or Shell.

Responsibilities

• Develop innovative ERC or Power Intent analysis solutions for transistor‑level designs.
• Support voltage‑domain interactions: supply gating, isolation, level shifting, and power domain interactions.
• Collaborate with Custom Analog, Mixed‑Signal, Digital, RF teams to meet circuit ERC and power flows needs.
• Validate ML‑based applications and evaluate vendor/OSS EDA packages and tools.

Skills

ERC experience

Circuit tracing

Leadership

Automation scripting

Programming: Perl/Python/TCL/C/C++/Sh

Education

BS degree in Electrical Engineering

Tools

SVRF

TCL

Liberty/.lib

UPF IEEE1801

Cadence Conformal LEC

Virtuoso Power Manager

Innovus

Synopsys Library Compiler

Job description

Apple, Inc. seeks an engineer to design and validate custom circuit ERC and power‑intent flows for transistor‑level analog, RF and mixed‑signal designs.

You will develop CAD methodologies, implement circuit recognition, netlist tracing, and power domain interactions, partnering with CAD, layout, and technology teams. The role emphasizes hands‑on development, mentoring, and delivering robust verification tools across multiple technology nodes, with opportunities to influence hardware design used