Senior ASIC Verification CAD Lead

Ericsson; Austin (TX); Hybrid; USD 140,000 - 180,000; Full time

Benefits offered by this job

Competitive salary

Health benefits including choice of plans

401(k) plan with company contributions

Paid vacation and additional leave

Job summary

Ericsson is seeking a Silicon IP/SoC Verification CAD Lead in Austin, Texas. You will play a critical role in shaping and executing our verification methodology for ASIC IP and SoC development, leveraging your extensive experience.

Your role includes overseeing verification processes, mentoring teams, and driving the adoption of cutting-edge verification tools. This position offers excellent benefits and a hybrid work schedule, ensuring a dynamic work environment with opportunities for professional growth.

Qualifications

• 15+ years of experience in IP/SoC verification.
• Proven leadership abilities and experience managing verification teams.
• Strong programming skills in SystemVerilog and scripting languages.

Responsibilities

• Lead the development and implementation of advanced verification methodologies.
• Oversee the verification lifecycle from planning to execution.
• Mentor and guide junior verification engineers.

Skills

ASIC IP/ASIC SoC design

Verilog

System Verilog

Verification methodologies (UVM, OVM)

Scripting languages (Python, Perl)

Communication skills

Education

Bachelor’s or Master’s degree in Electrical Engineering or related field

Tools

VCS

Xcelium

Verilog simulators

Job description

Ericsson is seeking a Silicon IP/SoC Verification CAD Lead in Austin, Texas. You will play a critical role in shaping and executing our verification methodology for ASIC IP and SoC development, leveraging your extensive experience.

Your role includes overseeing verification processes, mentoring teams, and driving the adoption of cutting-edge verification tools. This position offers excellent benefits and a hybrid work schedule, ensuring a dynamic work environment with opportunities for professional growth.