Senior ASIC TPM: Lead Cross-Functional Silicon Programs

Meta Careers

Menlo Park (CA)

On-site

USD 168,000 - 234,000

Full time

14 days+
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Job summary

Meta seeks a Technical Program Manager with ASIC experience to lead cross-functional, multi-site teams delivering ASICs for Meta's Infrastructure Engineering group. You will manage programs across silicon, firmware, and platform software, driving roadmaps and milestones from concept to production.

The role requires hands-on PM maturity, strong stakeholder collaboration, and a track record of delivering complex ASIC projects in a matrix environment.

Qualifications

  • BS degree in Computer Science, Computer or Electrical Engineering or other technical field.
  • 10+ years of experience in ASIC development.
  • 2+ years of experience in Program/Product Management or Engineering Management with proven leadership.
  • Experience from technical details to big picture overview, managing ASIC design flow.
  • Experience in pre-silicon testing with Emulation, FPGA and post-silicon validation.

Responsibilities

  • Manage cross-functional infrastructure programs in a matrix organization across Silicon Engineering, Platform Software, Hardware Systems, Sourcing & Operations and vendors.
  • Drive and manage ASIC development and subsystems with vendors from concept to production.
  • Provide hands-on program management through silicon and firmware development from concept to production release.

Skills

ASIC development
Program management
Stakeholder management
Cross-functional leadership
RTL design

Education

BS degree in CS or EE

Tools

VHDL/Verilog/SystemVerilog
Synthesis
Emulation

Job description

Meta seeks a Technical Program Manager with ASIC experience to lead cross-functional, multi-site teams delivering ASICs for Meta's Infrastructure Engineering group. You will manage programs across silicon, firmware, and platform software, driving roadmaps and milestones from concept to production.

The role requires hands-on PM maturity, strong stakeholder collaboration, and a track record of delivering complex ASIC projects in a matrix environment.

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