Senior ASIC Physical Design Engineering Technical Lead

Cisco Systems, Inc; Austin (TX); On-site; USD 214,000 - 310,000; Full time

Job summary

Cisco Systems, Inc. is seeking an experienced Physical Design Engineer to own RTL-to-GDSII flows for advanced node tapeouts. You will work across RTL, DFT, and implementation teams to optimize performance and die size on cutting-edge silicon.

Ideal candidates have extensive full-chip experience, CTS leadership, and strong scripting in Python, TCL, or Perl. This role is on-site in the Austin area with Cisco’s Global Hardware Engineering team.

Qualifications

• Bachelor’s Degree in Electrical Engineering; 12+ years of Physical Design, or Master’s 8+ years, or PhD 5+ years
• Experience with Fullchip activities.
• Experience with RTL2GDSII flow and tapeouts in 7nm/5nm/3nm or below.
• Experience with EDA tools: Innovus, Primetime/Tempus, Redhawk/Voltus, Calibre.

Responsibilities

• RTL-to-GDSII implementation, including Logic Synthesis, Floorplanning, Place and Route, STA, Power Integrity, and Equivalence checks with focus on performance and die-size.
• Analyze tool flows, identify efficiency gaps, implement improvements.
• Collaborate with RTL, DFT, Implementation, EDA vendors, and tool/flow teams on design methodology.
• Guide CTS strategies and provide actionable feedback to implementation teams.
• Perform STA setup, convergence methods, and sign-off across multi-mode, multi-corner scenarios.
• Execute functional/timing ECOs and contribute to automation for STA methodology.
• Evaluate multiple timing methodologies/tools across technologies and design types.

Skills

Fullchip experience

RTL2GDSII flow

Python

TCL

Perl

Clock Tree Synthesis (CTS)

Education

Bachelor’s Degree in Electrical Engineering

Master’s Degree in Electrical Engineering

PhD in Electrical Engineering

Tools

Innovus

Primetime/Tempus

Redhawk/Voltus

Calibre

Job description

The application window is expected to close on: 11/30/2026

Meet the Team

The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

Your Impact

• RTL-to-GDSII implementation, including Logic Synthesis, Hierarchical Floorplanning, Place and Route, Static Timing Analysis, Power Integrity, and Equivalence checks with a focus on Performance and Die-Size Optimization.
• Analyze existing tool flows and methodologies, identifying efficiency gaps and implementing incremental or transformative enhancements.
• Work closely with RTL, DFT, Implementation, EDA vendors, and tool/flow teams to enable best-in-class design methodology.
• Guide Clock Tree Synthesis (CTS) strategies and provide actionable feedback to the implementation teams.
• Execute STA setup, convergence methodologies, and sign-off processes across multi-mode, multi-corner scenarios.
• Complete Functional and Timing ECO implementation using industry-standard flows and contribute to automation for STA methodology.
• Evaluate multiple timing methodologies/tools across different technologies and design types.

Minimum Qualifications

• Bachelor’s Degree in Electrical Engineering with 12+ years of Physical Design experience or Master’s Degree in Electrical Engineering with 8+ years of Physical Design experience, or PhD in Electrical Engineering with 5+ years of Physical Design experience.
• Experience working on Fullchip activities.
• Experience with RTL2GDSII flow and design tapeouts in 7nm/5nm/3nm or below process technologies.
• Experience working with EDA tools like Innovus, Primetime/Tempus, Redhawk/Voltus and Calibre.

Preferred Qualifications

• Experience with hierarchical design, timing closure, physical convergence, and power integrity analysis.
• Experience with static timing analysis and concepts, defining timing constraints and exceptions, corners/voltage definitions.
• Experience in Fullchip floor-planning and power grid planning.
• Experience with custom clock (H-Tree or Mesh) at chip level.
• Experience with Python, TCL, or Perl programming.

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $214,100.00 to $309,800.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

• 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
• 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
• Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
• Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
• 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
• Additional paid time away may be requested to deal with critical or emergency issues for family members
• Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees On Sales Plans Earn Performance-based Incentive Pay On Top Of Their Base Salary, Which Is Split Between Quota And Non-quota Components, Subject To The Applicable Cisco Plan. For Quota-based Incentive Pay, Cisco Typically Pays As Follows

• .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
• 1.5% of incentive target for each 1% of attainment between 50% and 75%;
• 1% of incentive target for each 1% of attainment between 75% and 100%; and
• Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area

$214,100.00 - $356,300.00

Non-Metro New York State & Washington State

$192,400.00 - $317,200.00

• For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.
• Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.