Senior ASIC Front End (RTL) Design Engineer

Cerebras; Sunnyvale (CA); On-site; USD 150,000 - 200,000; Full time

Job summary

Cerebras is seeking a Senior ASIC Front End (RTL) Designer to be crucial in developing next-gen wafer-scale engines. The role requires deep expertise in RTL design to deliver high-performance, power-efficient solutions. Collaborating closely with multiple teams, you will tackle unique challenges in semiconductor integration. Join a groundbreaking company transforming AI with a supportive culture and ambitious goals.

Benefits

Job stability with startup vitality

Non-corporate work culture

Opportunities for continuous learning

Qualifications

• 10+ years delivering complex high-quality RTL designs.
• Experience with Front End Chip integration and third-party IP.
• Knowledge of high-speed memory interfaces and CPU interfaces.

Responsibilities

• Drive WSE design, including Functional Specification and Micro-architecture.
• Debug silicon-level functional, timing, and power issues.
• Collaborate with PD and DFT teams for design and test.

Skills

RTL design

High-performance computing

Machine learning

Python

TCL

Education

Master’s degree in Computer Science or Electrical Engineering

Tools

Scripting tools

Job description

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs.

Cerebras' current customers include global corporations across multiple industries, national labs, and top-tier healthcare systems. In January, we announced a multi-year, multi-million-dollar partnership with Mayo Clinic, underscoring our commitment to transforming AI applications across various fields. In August, we launched Cerebras Inference, the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services.

Senior ASIC Front End (RTL) designer

As a front-end design engineer, you will be a key part of the world-class team designing and developing the next generations of the Cerebras Wafer Scale Engine (WSE). This role requires deep expertise in RTL design and integration, with a strong focus on delivering high-performance, power-efficient, and scalable solutions. You will collaborate closely with the design verification, physical design, and software teams to bring innovative semiconductor architectures from concept to production, addressing the unique challenges of wafer-scale integration.

Responsibilities

Drive all aspects of WSE design, including Functional Specification, Micro-architecture, RTL development, Synthesis.

Work closely with PD team members for design closure to meet PPA goals

Work closely with DFT team members to develop optimal test of wafer-scale designs

Work with software teams to understand opportunities to deliver optimal performance and feature set for the product

Debug silicon-level functional, timing, and power issues during wafer bring up

Requirements

• Master’s degree in Computer Science, Electrical Engineering, or equivalent

10+ years of experience in delivering complex, high performance high quality RTL designs

Demonstrated experience in high-performance computing, networking, machine learning or related fields

Proven track record of multiple silicon success.

Experience with Front End Chip integration and third-party IP integration

• Experience collaborating with hardware and software teams to deliver successful silicon

Knowledge of high-speed memory interfaces, CPU interfaces and Serdes technology

Working knowledge of scripting tools : Python, TCL

Desired skills

Networking stack experience including TCP/IP, RDMA and Ethernet is a plus

Experience with FPGA development toolchain, including Place and Route, Floor planning and Timing Analysis is a plus

Why Join Cerebras

People who are serious about software make their own hardware. At Cerebras we have built a breakthrough architecture that is unlocking new opportunities for the AI industry. With dozens of model releases and rapid growth, we’ve reached an inflection point in our business. Members of our team tell us there are five main reasons they joined Cerebras:

1. Build a breakthrough AI platform beyond the constraints of the GPU.
2. Publish and open source their cutting-edge AI research.
3. Work on one of the fastest AI supercomputers in the world.
4. Enjoy job stability with startup vitality.
5. Our simple, non-corporate work culture that respects individual beliefs.

Read our blog: Five Reasons to Join Cerebras in 2025.

Apply today and become part of the forefront of groundbreaking advancements in AI!

Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them.

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