Senior ASIC Design Verification Engineer

Micron Technology, Inc; Minneapolis (MN); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, dental, vision plans

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. invites a Senior ASIC Design Verification Engineer to join its ASIC Verification team in Minnesota. You will own verification environments end-to-end for complex SOCs, collaborating with design and post-silicon teams, and driving high-quality verification plans.

You will leverage UVM, SystemVerilog, and Python, with opportunities to apply AI-assisted techniques. The role emphasizes constrained random verification, debugging, and strong communication.

Qualifications

• Bachelor’s or Master’s degree in Electrical or Computer Engineering or equivalent.
• 3+ years of IP or SoC verification experience.
• Hands-on with UVM and constrained-random verification.
• Strong SystemVerilog and Python skills.
• Good analytical, debugging, and communication abilities.

Responsibilities

• Develop and maintain UVM-based SystemVerilog verification environments.
• Build and enhance Python-based testbenches and simulation infra.
• Define and execute block and system-level verification plans.
• Debug complex functional and integration issues with design teams.
• Drive coverage closure and improve verification quality metrics.
• Explore AI-assisted techniques to boost productivity and debugging efficiency.
• Collaborate closely with verification, design, and post-silicon teams.
• Demonstrate excellent problem-solving and teamwork.

Skills

UVM verification

SystemVerilog

Python

Verification plans

Debugging

AI-assisted methods

Problem solving

Team communication

IP/SoC verification

Education

BSc/MSc EE or CE

Tools

UVM

SystemVerilog

Python

Job description

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Senior ASIC Design Verification Engineer (Technical role)

As a technical member of Micron’s ASIC Design Verification team, you will have a key role in development of advanced verification components for sophisticated SOC designs, while ensuring on time delivery with outstanding quality. You will take end‑to‑end ownership of verification environments, collaborate closely with verification, design, and post‑silicon validation teams, and help drive verification quality across Micron’s next‑generation memory products. Typical tasks include: development of new simulation environments, execution of verification plans while communicating with design teams, and debugging sophisticated problems. You must be familiar with constrained random verification and functional coverage closure. You will be a self‑starter, possess excellent analytical and problem solving/debugging skills, and have excellent verbal and written communication skills. You will also have opportunities to adopt and influence emerging AI‑based approaches that improve verification productivity, debugging efficiency, and quality.

Responsibilities

• ASIC/FPGA design verification experience with UVM methodologies.
• Develop and maintain UVM‑based SystemVerilog verification environments.
• Build and enhance Python‑based testbenches and simulation infrastructure.
• Define and execute block and system‑level verification plans.
• Debug complex functional and integration issues in close collaboration with design teams.
• Drive coverage closure and continuously improve verification quality metrics.
• Explore and adopt AI‑assisted techniques and tools to improve verification productivity and debug efficiency.
• Excellent problem‑solving skills.
• Phenomenal teammate with excellent interpersonal communication skills.

Minimum Qualifications

• Bachelor’s or Master's degree in Electrical Engineering, Computer Engineering or equivalent.
• 3+ years of proven experience in IP or SoC verification.
• Hands‑on experience with UVM and constrained‑random verification.
• Strong proficiency in SystemVerilog and Python.
• Proven analytical, debugging, and communication skills.

Preferred Qualifications

• Experience with mixed‑signal verification.
• Experience with DRAM protocol: DDR/LPDDR/GDDR.
• Experience using or evaluating AI‑assisted development, verification, or debug tools.
• Interest in applying AI/ML techniques to improve verification flows, automation, or productivity.
• Experience working in fast‑paced, highly collaborative engineering environments.

Job Profile(s)

ASIC Engineer 3

Relocation Level: TBD

Benefits

• We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
• Micron benefits include a robust paid time‑off program and paid holidays.

Equal Opportunity Statement

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.