Senior ASIC Design Automation & Flows Engineer

Amazon; Austin (TX); On-site; USD 185,000 - 250,000; Full time

Job summary

Amazon's Annapurna Labs in Austin, TX seeks an ASIC Design Methodologies and Infrastructure Engineer to automate design flows and build scalable solutions for silicon development. You will collaborate across architects, designers, and verification engineers to refine flows, elevate quality, and boost productivity.

The ideal candidate has deep RTL design expertise, strong scripting skills, and a passion for automating complex SOC workflows to deliver reliable, high-performance silicon solutions.

Qualifications

• 7+ years of ASIC implementation, synthesis, STA and physical design in deep sub-micron nodes (16nm or smaller) experience.
• 7+ years of digital design in communication systems experience.
• 7+ years of full-custom analog or RF layout experience.
• 7+ years of wireless communications systems and implementation experience.
• 8+ years of creating and maintaining automation frameworks for Post-Silicon Flow experience.
• 7+ years of verification in communication systems experience.
• 5+ years of UVM, C, System C, and scripting experience.

Responsibilities

• Develop and implement new methodologies and infrastructure to empower design teams to operate efficiently while maintaining high-quality standards.
• Enhance and build design flows to boost the overall productivity of design teams.
• Collaborate with vendors to evaluate and qualify new design tools and updated tool versions.

Skills

ASIC implementation

Digital design

Automation frameworks

Verification

UVM & scripting

C / SystemC

RF layout

Education

Master's degree in Electrical Engineering

Ph.D. in Electrical Engineering

Tools

RTL tooling

SOC bring-up tools

Job description

Amazon's Annapurna Labs in Austin, TX seeks an ASIC Design Methodologies and Infrastructure Engineer to automate design flows and build scalable solutions for silicon development. You will collaborate across architects, designers, and verification engineers to refine flows, elevate quality, and boost productivity.

The ideal candidate has deep RTL design expertise, strong scripting skills, and a passion for automating complex SOC workflows to deliver reliable, high-performance silicon solutions.