Senior Analog/Mixed-Signal Design Engineer (CIM NAND)

3M HEALTHCARE; San Jose (CA); On-site; USD 116,000 - 246,000; Full time

Benefits offered by this job

Medical benefits

Dental benefits

Vision benefits

Job summary

Micron Technology, Inc. in San Jose, CA seeks a Sr.

or Staff Design Engineer in the NVE Design Engineering Analog group to contribute to memory product development, applying specialized knowledge of analog and mixed-signal circuits used in CIM-enabled and traditional NAND devices. Responsibilities include designing, simulating, and validating NAND analog/mixed-signal circuits, evaluating performance across PVT, building Python-based tooling to accelerate tasks, and collaborating with Product,

Qualifications

• PhD preferred; MS in electrical engineering required.
• 4+ years NAND design experience with CIM projects.
• Strong background in analog/mixed-signal circuit design and ADC design.
• Proficiency in Python and scripting for EDA workflows.

Responsibilities

• Design, simulate, optimize, and floorplan NAND analog/mixed-signal circuits.
• Evaluate design feasibility across conventional and CIM modes.
• Design and validate high-performance ADC architectures for NAND sensing.
• Implement analog/mixed-signal circuits for sensing, amplification, and conditioning.
• Run block/chip-level simulations and collaborate with cross-functional teams.
• Develop Python utilities to interface with EDA environments and automate tasks.

Skills

NAND design

Analog/mixed-signal design

Python programming

ADC design

Circuit debugging

Verilog

HSPICE/Simulators

Education

MS in Electrical Engineering

PhD preferred

Tools

Cadence design tools

HSPICE/Fast SPICE

Verilog

Job description

Micron Technology, Inc. in San Jose, CA seeks a Sr.

or Staff Design Engineer in the NVE Design Engineering Analog group to contribute to memory product development, applying specialized knowledge of analog and mixed-signal circuits used in CIM-enabled and traditional NAND devices. Responsibilities include designing, simulating, and validating NAND analog/mixed-signal circuits, evaluating performance across PVT, building Python-based tooling to accelerate tasks, and collaborating with Product,